src/f32-vbinary/vopc-avx.c.in

// Copyright 2019 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$assert BATCH_TILE % 8 == 0
$assert BATCH_TILE >= 8
$SIMD_TILE = BATCH_TILE // 8
$assert OP in ["ADD", "DIV", "RDIV", "MAX", "MIN", "MUL", "SUB", "RSUB", "SQRDIFF", "PRELU", "RPRELU"]
#include <assert.h>
#include <stddef.h>
#include <stdint.h>

#include <immintrin.h>

#include "src/xnnpack/common.h"
#include "src/xnnpack/microparams.h"
#include "src/xnnpack/vbinary.h"


$_MM256_OP_PS = {
$  "ADD": lambda x: "_mm256_add_ps(%s, vb)" % x,
$  "DIV": lambda x: "_mm256_div_ps(%s, vb)" % x,
$  "RDIV": lambda x: "_mm256_div_ps(vb, %s)" % x,
$  "MAX": lambda x: "_mm256_max_ps(%s, vb)" % x,
$  "MIN": lambda x: "_mm256_min_ps(%s, vb)" % x,
$  "MUL": lambda x: "_mm256_mul_ps(%s, vb)" % x,
$  "SUB": lambda x: "_mm256_sub_ps(%s, vb)" % x,
$  "RSUB": lambda x: "_mm256_sub_ps(vb, %s)" % x,
$  "SQRDIFF": lambda x: "_mm256_sub_ps(%s, vb)" % x,
$  "PRELU": lambda x: "_mm256_mul_ps(%s, vb)" % x,
$  "RPRELU": lambda x: "_mm256_mul_ps(%s, vb)" % x,
$}[OP]
void xnn_f32_v${OP.lower()}c_ukernel__avx_u${BATCH_TILE}(
    size_t batch,
    const float* input_a,
    const float* input_b,
    float* output,
    const struct xnn_f32_default_params* restrict params)
{
  assert(batch != 0);
  assert(batch % sizeof(float) == 0);
  assert(input_a != NULL);
  assert(input_b != NULL);
  assert(output != NULL);

  static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};

  const __m256 vb = _mm256_broadcast_ss(input_b);

  $if BATCH_TILE > 8:
    for (; batch >= ${BATCH_TILE} * sizeof(float); batch -= ${BATCH_TILE} * sizeof(float)) {
      $for N in range(SIMD_TILE):
        const __m256 va${N} = _mm256_loadu_ps(input_a + ${N * 8});
      input_a += ${BATCH_TILE};

      $for N in range(SIMD_TILE):
        __m256 vacc${N} = ${_MM256_OP_PS("va" + str(N))};

      $if OP == "SQRDIFF":
        $for N in range(SIMD_TILE):
          vacc${N} = _mm256_mul_ps(vacc${N}, vacc${N});
      $elif OP == "PRELU":
        $for N in range(SIMD_TILE):
          vacc${N} = _mm256_blendv_ps(va${N}, vacc${N}, va${N});
      $elif OP == "RPRELU":
        $for N in range(SIMD_TILE):
          vacc${N} = _mm256_blendv_ps(vb, vacc${N}, vb);

      $for N in range(SIMD_TILE):
        _mm256_storeu_ps(output + ${N * 8}, vacc${N});
      output += ${BATCH_TILE};
    }
  for (; batch >= 8 * sizeof(float); batch -= 8 * sizeof(float)) {
    const __m256 va = _mm256_loadu_ps(input_a);
    input_a += 8;

    __m256 vacc = ${_MM256_OP_PS("va")};
    $if OP == "SQRDIFF":
      vacc = _mm256_mul_ps(vacc, vacc);
    $elif OP == "PRELU":
      vacc = _mm256_blendv_ps(va, vacc, va);
    $elif OP == "RPRELU":
      vacc = _mm256_blendv_ps(vb, vacc, vb);
    _mm256_storeu_ps(output, vacc);
    output += 8;
  }
  if XNN_UNLIKELY(batch != 0) {
    assert(batch >= 1 * sizeof(float));
    assert(batch <= 7 * sizeof(float));
    const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - batch));

    __m256 va = _mm256_maskload_ps(input_a, vmask);

    __m256 vacc = ${_MM256_OP_PS("va")};
    $if OP == "SQRDIFF":
      vacc = _mm256_mul_ps(vacc, vacc);
    $elif OP == "PRELU":
      vacc = _mm256_blendv_ps(va, vacc, va);
    $elif OP == "RPRELU":
      vacc = _mm256_blendv_ps(vb, vacc, vb);

    __m128 vacc_lo = _mm256_castps256_ps128(vacc);
    if (batch & (4 * sizeof(float))) {
      _mm_storeu_ps(output, vacc_lo);
      vacc_lo = _mm256_extractf128_ps(vacc, 1);
      output += 4;
    }
    if (batch & (2 * sizeof(float))) {
      _mm_storel_pi((__m64*) output, vacc_lo);
      vacc_lo = _mm_movehl_ps(vacc_lo, vacc_lo);
      output += 2;
    }
    if (batch & (1 * sizeof(float))) {
      _mm_store_ss(output, vacc_lo);
    }
  }
}