| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in5_pa0: adc1_in5_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in6_pa1: adc1_in6_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in7_pa2: adc1_in7_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in8_pa3: adc1_in8_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in9_pa4: adc1_in9_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc1_in10_pa5: adc1_in10_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc1_in11_pa6: adc1_in11_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc1_in12_pa7: adc1_in12_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc1_in15_pb0: adc1_in15_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc1_in16_pb1: adc1_in16_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc1_in1_pc0: adc1_in1_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc1_in2_pc1: adc1_in2_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, ANALOG)>; |
| }; |
| |
| adc1_in3_pc2: adc1_in3_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc1_in4_pc3: adc1_in4_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc1_in13_pc4: adc1_in13_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, ANALOG)>; |
| }; |
| |
| adc1_in14_pc5: adc1_in14_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, ANALOG)>; |
| }; |
| |
| /* CAN_RX */ |
| |
| can1_rx_pa11: can1_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pb5: can1_rx_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF3)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pb8: can1_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pb12: can1_rx_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF10)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pd0: can1_rx_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF9)>; |
| bias-pull-up; |
| }; |
| |
| /* CAN_TX */ |
| |
| can1_tx_pa12: can1_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF9)>; |
| }; |
| |
| can1_tx_pb6: can1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF8)>; |
| }; |
| |
| can1_tx_pb9: can1_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF9)>; |
| }; |
| |
| can1_tx_pb13: can1_tx_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF10)>; |
| }; |
| |
| can1_tx_pd1: can1_tx_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF9)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac1_out1_pa4: dac1_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pa9: i2c1_scl_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb8: i2c1_scl_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb10: i2c2_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb13: i2c2_scl_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pa7: i2c3_scl_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pc0: i2c3_scl_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pb6: i2c4_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pb10: i2c4_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pc0: i2c4_scl_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_scl_pd12: i2c4_scl_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pa10: i2c1_sda_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb11: i2c2_sda_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb14: i2c2_sda_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pb4: i2c3_sda_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pc1: i2c3_sda_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pb7: i2c4_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pb11: i2c4_sda_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF3)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pc1: i2c4_sda_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c4_sda_pd13: i2c4_sda_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* QUADSPI */ |
| |
| quadspi_bk1_ncs_pa2: quadspi_bk1_ncs_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_clk_pa3: quadspi_clk_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io3_pa6: quadspi_bk1_io3_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io2_pa7: quadspi_bk1_io2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io1_pb0: quadspi_bk1_io1_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io0_pb1: quadspi_bk1_io0_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_clk_pb10: quadspi_clk_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_ncs_pb11: quadspi_bk1_ncs_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_ncs_pd3: quadspi_bk2_ncs_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io0_pd4: quadspi_bk2_io0_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io1_pd5: quadspi_bk2_io1_pd5 { |
| pinmux = <STM32_PINMUX('D', 5, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io2_pd6: quadspi_bk2_io2_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io3_pd7: quadspi_bk2_io3_pd7 { |
| pinmux = <STM32_PINMUX('D', 7, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_clk_pe10: quadspi_clk_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_ncs_pe11: quadspi_bk1_ncs_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io0_pe12: quadspi_bk1_io0_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io1_pe13: quadspi_bk1_io1_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io2_pe14: quadspi_bk1_io2_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io3_pe15: quadspi_bk1_io3_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* SDMMC */ |
| |
| sdmmc1_d4_pb8: sdmmc1_d4_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d5_pb9: sdmmc1_d5_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d6_pc6: sdmmc1_d6_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d7_pc7: sdmmc1_d7_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d0_pc8: sdmmc1_d0_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d1_pc9: sdmmc1_d1_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d2_pc10: sdmmc1_d2_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_d3_pc11: sdmmc1_d3_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_ck_pc12: sdmmc1_ck_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| sdmmc1_cmd_pd2: sdmmc1_cmd_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF12)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pa11: spi1_miso_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pe14: spi1_miso_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pc2: spi2_miso_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pd3: spi2_miso_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pb4: spi3_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pc11: spi3_miso_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pa12: spi1_mosi_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pe15: spi1_mosi_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pc3: spi2_mosi_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pd4: spi2_mosi_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb5: spi3_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pc12: spi3_mosi_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF6)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pb0: spi1_nss_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pe12: spi1_nss_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb9: spi2_nss_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pd0: spi2_nss_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa4: spi3_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa15: spi3_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa1: spi1_sck_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pe13: spi1_sck_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb10: spi2_sck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pd1: spi2_sck_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pb3: spi3_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pc10: spi3_sck_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF1)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF1)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF1)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF1)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF1)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF1)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF1)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim1_ch1n_pe8: tim1_ch1n_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF1)>; |
| }; |
| |
| tim1_ch1_pe9: tim1_ch1_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF1)>; |
| }; |
| |
| tim1_ch2n_pe10: tim1_ch2n_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF1)>; |
| }; |
| |
| tim1_ch2_pe11: tim1_ch2_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF1)>; |
| }; |
| |
| tim1_ch3n_pe12: tim1_ch3n_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF1)>; |
| }; |
| |
| tim1_ch3_pe13: tim1_ch3_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF1)>; |
| }; |
| |
| tim1_ch4_pe14: tim1_ch4_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF1)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| }; |
| |
| tim2_ch4_pb11: tim2_ch4_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF1)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim3_ch4_pb1: tim3_ch4_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF2)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF2)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF2)>; |
| }; |
| |
| tim3_ch1_pc6: tim3_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pc7: tim3_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pc8: tim3_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF2)>; |
| }; |
| |
| tim3_ch4_pc9: tim3_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF2)>; |
| }; |
| |
| tim3_ch1_pe3: tim3_ch1_pe3 { |
| pinmux = <STM32_PINMUX('E', 3, AF2)>; |
| }; |
| |
| tim3_ch2_pe4: tim3_ch2_pe4 { |
| pinmux = <STM32_PINMUX('E', 4, AF2)>; |
| }; |
| |
| tim3_ch3_pe5: tim3_ch3_pe5 { |
| pinmux = <STM32_PINMUX('E', 5, AF2)>; |
| }; |
| |
| tim3_ch4_pe6: tim3_ch4_pe6 { |
| pinmux = <STM32_PINMUX('E', 6, AF2)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF14)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF14)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF14)>; |
| }; |
| |
| tim15_ch1n_pb13: tim15_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF14)>; |
| }; |
| |
| tim15_ch1_pb14: tim15_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF14)>; |
| }; |
| |
| tim15_ch2_pb15: tim15_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF14)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF14)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF14)>; |
| }; |
| |
| tim16_ch1_pb8: tim16_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF14)>; |
| }; |
| |
| tim16_ch1_pe0: tim16_ch1_pe0 { |
| pinmux = <STM32_PINMUX('E', 0, AF14)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| lpuart1_cts_pa6: lpuart1_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_cts_pb4: usart1_cts_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_cts_pb13: lpuart1_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pd3: usart2_cts_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pa6: usart3_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pd11: usart3_cts_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_cts_pb7: uart4_cts_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb1: lpuart1_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart1_rts_pb3: usart1_rts_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| lpuart1_rts_pb12: lpuart1_rts_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pd4: usart2_rts_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pa15: usart3_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb1: usart3_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd2: usart3_rts_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd12: usart3_rts_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_rts_pa15: uart4_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| lpuart1_rx_pa3: lpuart1_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF8)>; |
| }; |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| lpuart1_rx_pb10: lpuart1_rx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF8)>; |
| }; |
| |
| lpuart1_rx_pc0: lpuart1_rx_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF8)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF3)>; |
| }; |
| |
| usart2_rx_pd6: usart2_rx_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF7)>; |
| }; |
| |
| usart3_rx_pb11: usart3_rx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF7)>; |
| }; |
| |
| usart3_rx_pc5: usart3_rx_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, AF7)>; |
| }; |
| |
| usart3_rx_pc11: usart3_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF7)>; |
| }; |
| |
| usart3_rx_pd9: usart3_rx_pd9 { |
| pinmux = <STM32_PINMUX('D', 9, AF7)>; |
| }; |
| |
| uart4_rx_pa1: uart4_rx_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF8)>; |
| }; |
| |
| uart4_rx_pc11: uart4_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF8)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| lpuart1_tx_pa2: lpuart1_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| lpuart1_tx_pb11: lpuart1_tx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF8)>; |
| bias-pull-up; |
| }; |
| |
| lpuart1_tx_pc1: lpuart1_tx_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pd5: usart2_tx_pd5 { |
| pinmux = <STM32_PINMUX('D', 5, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc4: usart3_tx_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc10: usart3_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pd8: usart3_tx_pd8 { |
| pinmux = <STM32_PINMUX('D', 8, AF7)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pa0: uart4_tx_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF8)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pc10: uart4_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF8)>; |
| bias-pull-up; |
| }; |
| |
| }; |
| }; |
| }; |
