| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@40020000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in0_pa0: adc1_in0_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in1_pa1: adc1_in1_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in2_pa2: adc1_in2_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in3_pa3: adc1_in3_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in4_pa4: adc1_in4_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc1_in5_pa5: adc1_in5_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc1_in6_pa6: adc1_in6_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc1_in7_pa7: adc1_in7_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc1_in8_pb0: adc1_in8_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc1_in9_pb1: adc1_in9_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc1_in10_pc0: adc1_in10_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc1_in12_pc2: adc1_in12_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc1_in13_pc3: adc1_in13_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc1_in14_pc4: adc1_in14_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, ANALOG)>; |
| }; |
| |
| adc2_in0_pa0: adc2_in0_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc2_in1_pa1: adc2_in1_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc2_in2_pa2: adc2_in2_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc2_in3_pa3: adc2_in3_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc2_in4_pa4: adc2_in4_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc2_in5_pa5: adc2_in5_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc2_in6_pa6: adc2_in6_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc2_in7_pa7: adc2_in7_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc2_in8_pb0: adc2_in8_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc2_in9_pb1: adc2_in9_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc2_in10_pc0: adc2_in10_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc2_in12_pc2: adc2_in12_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc2_in13_pc3: adc2_in13_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc2_in14_pc4: adc2_in14_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, ANALOG)>; |
| }; |
| |
| adc3_in0_pa0: adc3_in0_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc3_in1_pa1: adc3_in1_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc3_in2_pa2: adc3_in2_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc3_in3_pa3: adc3_in3_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc3_in10_pc0: adc3_in10_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc3_in12_pc2: adc3_in12_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc3_in13_pc3: adc3_in13_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| /* CAN_RX */ |
| |
| can1_rx_pa11: can1_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pb8: can1_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can1_rx_pd0: can1_rx_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can2_rx_pb5: can2_rx_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF9)>; |
| bias-pull-up; |
| }; |
| |
| can2_rx_pb12: can2_rx_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF9)>; |
| bias-pull-up; |
| }; |
| |
| /* CAN_TX */ |
| |
| can1_tx_pa12: can1_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF9)>; |
| }; |
| |
| can1_tx_pb9: can1_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF9)>; |
| }; |
| |
| can1_tx_pd1: can1_tx_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF9)>; |
| }; |
| |
| can2_tx_pb6: can2_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF9)>; |
| }; |
| |
| can2_tx_pb13: can2_tx_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF9)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac_out1_pa4: dac_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| dac_out2_pa5: dac_out2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb8: i2c1_scl_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb10: i2c2_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_scl_pa8: i2c3_scl_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb3: i2c2_sda_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pc12: i2c2_sda_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pb4: i2c3_sda_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c3_sda_pc9: i2c3_sda_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2S_CK */ |
| |
| i2s1_ck_pa5: i2s1_ck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s1_ck_pb3: i2s1_ck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pa9: i2s2_ck_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pb10: i2s2_ck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pb13: i2s2_ck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pc7: i2s2_ck_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s3_ck_pb3: i2s3_ck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s3_ck_pc10: i2s3_ck_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF6)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* I2S_SD */ |
| |
| i2s1_sd_pa7: i2s1_sd_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| }; |
| |
| i2s1_sd_pb5: i2s1_sd_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| }; |
| |
| i2s2_sd_pb15: i2s2_sd_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| }; |
| |
| i2s2_sd_pc3: i2s2_sd_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF5)>; |
| }; |
| |
| i2s3_sd_pb0: i2s3_sd_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF7)>; |
| }; |
| |
| i2s3_sd_pb2: i2s3_sd_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF7)>; |
| }; |
| |
| i2s3_sd_pb5: i2s3_sd_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| }; |
| |
| i2s3_sd_pc12: i2s3_sd_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF6)>; |
| }; |
| |
| i2s3_sd_pd0: i2s3_sd_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF6)>; |
| }; |
| |
| i2s3_sd_pd6: i2s3_sd_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF5)>; |
| }; |
| |
| /* I2S_WS */ |
| |
| i2s1_ws_pa4: i2s1_ws_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| }; |
| |
| i2s1_ws_pa15: i2s1_ws_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| }; |
| |
| i2s2_ws_pb4: i2s2_ws_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| }; |
| |
| i2s2_ws_pb9: i2s2_ws_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| }; |
| |
| i2s2_ws_pb12: i2s2_ws_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| }; |
| |
| i2s2_ws_pd1: i2s2_ws_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF7)>; |
| }; |
| |
| i2s3_ws_pa4: i2s3_ws_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| }; |
| |
| i2s3_ws_pa15: i2s3_ws_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| }; |
| |
| /* QUADSPI */ |
| |
| quadspi_bk1_io3_pa1: quadspi_bk1_io3_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_clk_pb2: quadspi_clk_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_ncs_pb6: quadspi_bk1_ncs_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io0_pc9: quadspi_bk1_io0_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io1_pc10: quadspi_bk1_io1_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_ncs_pc11: quadspi_bk2_ncs_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io0_pd11: quadspi_bk1_io0_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io1_pd12: quadspi_bk1_io1_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io3_pd13: quadspi_bk1_io3_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk1_io2_pe2: quadspi_bk1_io2_pe2 { |
| pinmux = <STM32_PINMUX('E', 2, AF9)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io0_pe7: quadspi_bk2_io0_pe7 { |
| pinmux = <STM32_PINMUX('E', 7, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io1_pe8: quadspi_bk2_io1_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io2_pe9: quadspi_bk2_io2_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| quadspi_bk2_io3_pe10: quadspi_bk2_io3_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF10)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pc2: spi2_miso_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pb4: spi3_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_miso_pc11: spi3_miso_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi4_miso_pd0: spi4_miso_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pc3: spi2_mosi_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb0: spi3_mosi_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF7)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb2: spi3_mosi_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF7)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pb5: spi3_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pc12: spi3_mosi_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pd0: spi3_mosi_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF6)>; |
| bias-pull-down; |
| }; |
| |
| spi3_mosi_pd6: spi3_mosi_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb4: spi2_nss_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb9: spi2_nss_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pd1: spi2_nss_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF7)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa4: spi3_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi3_nss_pa15: spi3_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF6)>; |
| bias-pull-up; |
| }; |
| |
| spi4_nss_pe4: spi4_nss_pe4 { |
| pinmux = <STM32_PINMUX('E', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pa9: spi2_sck_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb10: spi2_sck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pc7: spi2_sck_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pb3: spi3_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi3_sck_pc10: spi3_sck_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF6)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi4_sck_pe2: spi4_sck_pe2 { |
| pinmux = <STM32_PINMUX('E', 2, AF5)>; |
| bias-pull-down; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim10_ch1_pb8: tim10_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF3)>; |
| }; |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF1)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF1)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF1)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF1)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF1)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF1)>; |
| }; |
| |
| tim11_ch1_pb9: tim11_ch1_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF3)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF1)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim1_ch1n_pe8: tim1_ch1n_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF1)>; |
| }; |
| |
| tim1_ch1_pe9: tim1_ch1_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF1)>; |
| }; |
| |
| tim1_ch2n_pe10: tim1_ch2n_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF1)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch4_pb2: tim2_ch4_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pb8: tim2_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF1)>; |
| }; |
| |
| tim2_ch2_pb9: tim2_ch2_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF1)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| }; |
| |
| tim12_ch1_pb14: tim12_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF9)>; |
| }; |
| |
| tim12_ch2_pb15: tim12_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF9)>; |
| }; |
| |
| tim13_ch1_pa6: tim13_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF9)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim3_ch4_pb1: tim3_ch4_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF2)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF2)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF2)>; |
| }; |
| |
| tim3_ch1_pc6: tim3_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pc7: tim3_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pc8: tim3_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF2)>; |
| }; |
| |
| tim3_ch4_pc9: tim3_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF2)>; |
| }; |
| |
| tim14_ch1_pa7: tim14_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF9)>; |
| }; |
| |
| tim4_ch1_pb6: tim4_ch1_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF2)>; |
| }; |
| |
| tim4_ch2_pb7: tim4_ch2_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF2)>; |
| }; |
| |
| tim4_ch3_pb8: tim4_ch3_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF2)>; |
| }; |
| |
| tim4_ch4_pb9: tim4_ch4_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF2)>; |
| }; |
| |
| tim4_ch1_pd12: tim4_ch1_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF2)>; |
| }; |
| |
| tim4_ch2_pd13: tim4_ch2_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, AF2)>; |
| }; |
| |
| tim5_ch1_pa0: tim5_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF2)>; |
| }; |
| |
| tim5_ch2_pa1: tim5_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF2)>; |
| }; |
| |
| tim5_ch3_pa2: tim5_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF2)>; |
| }; |
| |
| tim5_ch4_pa3: tim5_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF2)>; |
| }; |
| |
| tim8_ch1n_pa5: tim8_ch1n_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF3)>; |
| }; |
| |
| tim8_ch1n_pa7: tim8_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF3)>; |
| }; |
| |
| tim8_ch2n_pb0: tim8_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF3)>; |
| }; |
| |
| tim8_ch3n_pb1: tim8_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF3)>; |
| }; |
| |
| tim8_ch2n_pb14: tim8_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF3)>; |
| }; |
| |
| tim8_ch3n_pb15: tim8_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF3)>; |
| }; |
| |
| tim8_ch1_pc6: tim8_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF3)>; |
| }; |
| |
| tim8_ch2_pc7: tim8_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF3)>; |
| }; |
| |
| tim8_ch3_pc8: tim8_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF3)>; |
| }; |
| |
| tim8_ch4_pc9: tim8_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF3)>; |
| }; |
| |
| tim9_ch1_pa2: tim9_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF3)>; |
| }; |
| |
| tim9_ch2_pa3: tim9_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF3)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pd11: usart3_cts_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_cts_pb0: uart4_cts_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart5_cts_pc9: uart5_cts_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pd4: usart2_rts_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd12: usart3_rts_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart4_rts_pa15: uart4_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF8)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| uart5_rts_pc8: uart5_rts_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pd6: usart2_rx_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF7)>; |
| }; |
| |
| usart3_rx_pc11: usart3_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF7)>; |
| }; |
| |
| uart4_rx_pa1: uart4_rx_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF8)>; |
| }; |
| |
| uart4_rx_pc11: uart4_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF8)>; |
| }; |
| |
| uart5_rx_pd2: uart5_rx_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF8)>; |
| }; |
| |
| uart5_rx_pe7: uart5_rx_pe7 { |
| pinmux = <STM32_PINMUX('E', 7, AF8)>; |
| }; |
| |
| usart6_rx_pc7: usart6_rx_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF8)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc10: usart3_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF7)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pa0: uart4_tx_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF8)>; |
| bias-pull-up; |
| }; |
| |
| uart4_tx_pc10: uart4_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF8)>; |
| bias-pull-up; |
| }; |
| |
| uart5_tx_pc12: uart5_tx_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF8)>; |
| bias-pull-up; |
| }; |
| |
| uart5_tx_pe8: uart5_tx_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF8)>; |
| bias-pull-up; |
| }; |
| |
| usart6_tx_pc6: usart6_tx_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF8)>; |
| bias-pull-up; |
| }; |
| |
| /* USB_OTG_FS */ |
| |
| usb_otg_fs_sof_pa8: usb_otg_fs_sof_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF10)>; |
| }; |
| |
| usb_otg_fs_vbus_pa9: usb_otg_fs_vbus_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, ANALOG)>; |
| }; |
| |
| usb_otg_fs_id_pa10: usb_otg_fs_id_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF10)>; |
| }; |
| |
| usb_otg_fs_dm_pa11: usb_otg_fs_dm_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF10)>; |
| }; |
| |
| usb_otg_fs_dp_pa12: usb_otg_fs_dp_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF10)>; |
| }; |
| |
| /* USB_OTG_HS */ |
| |
| usb_otg_hs_sof_pa4: usb_otg_hs_sof_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF12)>; |
| }; |
| |
| usb_otg_hs_id_pb12: usb_otg_hs_id_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF12)>; |
| }; |
| |
| usb_otg_hs_vbus_pb13: usb_otg_hs_vbus_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, ANALOG)>; |
| }; |
| |
| usb_otg_hs_dm_pb14: usb_otg_hs_dm_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF12)>; |
| }; |
| |
| usb_otg_hs_dp_pb15: usb_otg_hs_dp_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF12)>; |
| }; |
| |
| /* USB_OTG_HS_ULPI */ |
| |
| usb_otg_hs_ulpi_d0_pa3: usb_otg_hs_ulpi_d0_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d1_pb0: usb_otg_hs_ulpi_d1_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d2_pb1: usb_otg_hs_ulpi_d2_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d4_pb2: usb_otg_hs_ulpi_d4_pb2 { |
| pinmux = <STM32_PINMUX('B', 2, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d7_pb5: usb_otg_hs_ulpi_d7_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d3_pb10: usb_otg_hs_ulpi_d3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d5_pb12: usb_otg_hs_ulpi_d5_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_d6_pb13: usb_otg_hs_ulpi_d6_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_stp_pc0: usb_otg_hs_ulpi_stp_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_dir_pc2: usb_otg_hs_ulpi_dir_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF10)>; |
| }; |
| |
| usb_otg_hs_ulpi_nxt_pc3: usb_otg_hs_ulpi_nxt_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF10)>; |
| }; |
| |
| }; |
| }; |
| }; |
