| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc1_in1_pa0: adc1_in1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc1_in2_pa1: adc1_in2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc1_in3_pa2: adc1_in3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc1_in4_pa3: adc1_in4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc1_in11_pb0: adc1_in11_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc2_in1_pa4: adc2_in1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc2_in2_pa5: adc2_in2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc2_in3_pa6: adc2_in3_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc2_in4_pa7: adc2_in4_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| /* CAN_RX */ |
| |
| can_rx_pa11: can_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF9)>; |
| bias-pull-up; |
| }; |
| |
| /* CAN_TX */ |
| |
| can_tx_pa12: can_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF9)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac1_out1_pa4: dac1_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| dac1_out2_pa5: dac1_out2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| dac2_out1_pa6: dac2_out1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pa15: i2c1_scl_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pa14: i2c1_sda_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF5)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF5)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF6)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF6)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF6)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF6)>; |
| }; |
| |
| tim1_ch1n_pa11: tim1_ch1n_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF6)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF11)>; |
| }; |
| |
| tim1_ch2n_pa12: tim1_ch2n_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF6)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF6)>; |
| }; |
| |
| tim1_ch3n_pf0: tim1_ch3n_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF6)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF1)>; |
| }; |
| |
| tim2_ch3_pa9: tim2_ch3_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF10)>; |
| }; |
| |
| tim2_ch4_pa10: tim2_ch4_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF10)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF1)>; |
| }; |
| |
| tim3_ch2_pa4: tim3_ch2_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF2)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF2)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF2)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF2)>; |
| }; |
| |
| tim3_ch4_pb7: tim3_ch4_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF10)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF9)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF9)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF9)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF1)>; |
| }; |
| |
| tim16_ch1_pa12: tim16_ch1_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF1)>; |
| }; |
| |
| tim16_ch1n_pa13: tim16_ch1n_pa13 { |
| pinmux = <STM32_PINMUX('A', 13, AF1)>; |
| }; |
| |
| tim16_ch1_pb4: tim16_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF1)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF1)>; |
| }; |
| |
| tim17_ch1_pa7: tim17_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim17_ch1_pb5: tim17_ch1_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF10)>; |
| }; |
| |
| tim17_ch1n_pb7: tim17_ch1n_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF1)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF7)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF7)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF7)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF7)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF7)>; |
| }; |
| |
| usart2_rx_pb4: usart2_rx_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF7)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa14: usart2_tx_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF7)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pb3: usart2_tx_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF7)>; |
| bias-pull-up; |
| }; |
| |
| }; |
| }; |
| }; |
