| /* |
| * NOTE: Autogenerated file using genpinctrl.py |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@48000000 { |
| |
| /* ADC_IN / ADC_INN / ADC_INP */ |
| |
| adc_in0_pa0: adc_in0_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, ANALOG)>; |
| }; |
| |
| adc_in1_pa1: adc_in1_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, ANALOG)>; |
| }; |
| |
| adc_in2_pa2: adc_in2_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, ANALOG)>; |
| }; |
| |
| adc_in3_pa3: adc_in3_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, ANALOG)>; |
| }; |
| |
| adc_in4_pa4: adc_in4_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| adc_in5_pa5: adc_in5_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| adc_in6_pa6: adc_in6_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, ANALOG)>; |
| }; |
| |
| adc_in7_pa7: adc_in7_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, ANALOG)>; |
| }; |
| |
| adc_in8_pb0: adc_in8_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, ANALOG)>; |
| }; |
| |
| adc_in9_pb1: adc_in9_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, ANALOG)>; |
| }; |
| |
| adc_in10_pc0: adc_in10_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, ANALOG)>; |
| }; |
| |
| adc_in11_pc1: adc_in11_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, ANALOG)>; |
| }; |
| |
| adc_in12_pc2: adc_in12_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, ANALOG)>; |
| }; |
| |
| adc_in13_pc3: adc_in13_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, ANALOG)>; |
| }; |
| |
| adc_in14_pc4: adc_in14_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, ANALOG)>; |
| }; |
| |
| adc_in15_pc5: adc_in15_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, ANALOG)>; |
| }; |
| |
| /* CAN_RX */ |
| |
| can_rx_pa11: can_rx_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF4)>; |
| bias-pull-up; |
| }; |
| |
| can_rx_pb8: can_rx_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF4)>; |
| bias-pull-up; |
| }; |
| |
| can_rx_pd0: can_rx_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF0)>; |
| bias-pull-up; |
| }; |
| |
| /* CAN_TX */ |
| |
| can_tx_pa12: can_tx_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF4)>; |
| }; |
| |
| can_tx_pb9: can_tx_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF4)>; |
| }; |
| |
| can_tx_pd1: can_tx_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF0)>; |
| }; |
| |
| /* DAC_OUT */ |
| |
| dac_out1_pa4: dac_out1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; |
| }; |
| |
| dac_out2_pa5: dac_out2_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, ANALOG)>; |
| }; |
| |
| /* I2C_SCL */ |
| |
| i2c1_scl_pa9: i2c1_scl_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb6: i2c1_scl_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pb8: i2c1_scl_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_scl_pf1: i2c1_scl_pf1 { |
| pinmux = <STM32_PINMUX('F', 1, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pa11: i2c2_scl_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb10: i2c2_scl_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_scl_pb13: i2c2_scl_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2C_SDA */ |
| |
| i2c1_sda_pa10: i2c1_sda_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb7: i2c1_sda_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pb9: i2c1_sda_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c1_sda_pf0: i2c1_sda_pf0 { |
| pinmux = <STM32_PINMUX('F', 0, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pa12: i2c2_sda_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb11: i2c2_sda_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| i2c2_sda_pb14: i2c2_sda_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF5)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* I2S_CK */ |
| |
| i2s1_ck_pa5: i2s1_ck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s1_ck_pb3: i2s1_ck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s1_ck_pe13: i2s1_ck_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF1)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pb10: i2s2_ck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pb13: i2s2_ck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| i2s2_ck_pd1: i2s2_ck_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF1)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* I2S_SD */ |
| |
| i2s1_sd_pa7: i2s1_sd_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF0)>; |
| }; |
| |
| i2s1_sd_pb5: i2s1_sd_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF0)>; |
| }; |
| |
| i2s1_sd_pe15: i2s1_sd_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF1)>; |
| }; |
| |
| i2s2_sd_pb15: i2s2_sd_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF0)>; |
| }; |
| |
| i2s2_sd_pc3: i2s2_sd_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF1)>; |
| }; |
| |
| i2s2_sd_pd4: i2s2_sd_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF1)>; |
| }; |
| |
| /* I2S_WS */ |
| |
| i2s1_ws_pa4: i2s1_ws_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF0)>; |
| }; |
| |
| i2s1_ws_pa15: i2s1_ws_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF0)>; |
| }; |
| |
| i2s1_ws_pe12: i2s1_ws_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF1)>; |
| }; |
| |
| i2s2_ws_pb9: i2s2_ws_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| }; |
| |
| i2s2_ws_pb12: i2s2_ws_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF0)>; |
| }; |
| |
| i2s2_ws_pd0: i2s2_ws_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF1)>; |
| }; |
| |
| /* SPI_MISO */ |
| |
| spi1_miso_pa6: spi1_miso_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pb4: spi1_miso_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi1_miso_pe14: spi1_miso_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF1)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pb14: spi2_miso_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pc2: spi2_miso_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF1)>; |
| bias-pull-down; |
| }; |
| |
| spi2_miso_pd3: spi2_miso_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF1)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_MOSI */ |
| |
| spi1_mosi_pa7: spi1_mosi_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pb5: spi1_mosi_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi1_mosi_pe15: spi1_mosi_pe15 { |
| pinmux = <STM32_PINMUX('E', 15, AF1)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pb15: spi2_mosi_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF0)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pc3: spi2_mosi_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF1)>; |
| bias-pull-down; |
| }; |
| |
| spi2_mosi_pd4: spi2_mosi_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF1)>; |
| bias-pull-down; |
| }; |
| |
| /* SPI_NSS */ |
| |
| spi1_nss_pa4: spi1_nss_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF0)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pa15: spi1_nss_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF0)>; |
| bias-pull-up; |
| }; |
| |
| spi1_nss_pe12: spi1_nss_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF1)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb9: spi2_nss_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF5)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pb12: spi2_nss_pb12 { |
| pinmux = <STM32_PINMUX('B', 12, AF0)>; |
| bias-pull-up; |
| }; |
| |
| spi2_nss_pd0: spi2_nss_pd0 { |
| pinmux = <STM32_PINMUX('D', 0, AF1)>; |
| bias-pull-up; |
| }; |
| |
| /* SPI_SCK */ |
| |
| spi1_sck_pa5: spi1_sck_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pb3: spi1_sck_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi1_sck_pe13: spi1_sck_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF1)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb10: spi2_sck_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF5)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pb13: spi2_sck_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF0)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| spi2_sck_pd1: spi2_sck_pd1 { |
| pinmux = <STM32_PINMUX('D', 1, AF1)>; |
| slew-rate = "very-high-speed"; |
| }; |
| |
| /* TIM_CH / TIM_CHN */ |
| |
| tim1_ch1n_pa7: tim1_ch1n_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF2)>; |
| }; |
| |
| tim1_ch1_pa8: tim1_ch1_pa8 { |
| pinmux = <STM32_PINMUX('A', 8, AF2)>; |
| }; |
| |
| tim1_ch2_pa9: tim1_ch2_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF2)>; |
| }; |
| |
| tim1_ch3_pa10: tim1_ch3_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF2)>; |
| }; |
| |
| tim1_ch4_pa11: tim1_ch4_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF2)>; |
| }; |
| |
| tim1_ch2n_pb0: tim1_ch2n_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF2)>; |
| }; |
| |
| tim1_ch3n_pb1: tim1_ch3n_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF2)>; |
| }; |
| |
| tim1_ch1n_pb13: tim1_ch1n_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF2)>; |
| }; |
| |
| tim1_ch2n_pb14: tim1_ch2n_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF2)>; |
| }; |
| |
| tim1_ch3n_pb15: tim1_ch3n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF2)>; |
| }; |
| |
| tim1_ch1n_pe8: tim1_ch1n_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF0)>; |
| }; |
| |
| tim1_ch1_pe9: tim1_ch1_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF0)>; |
| }; |
| |
| tim1_ch2n_pe10: tim1_ch2n_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF0)>; |
| }; |
| |
| tim1_ch2_pe11: tim1_ch2_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF0)>; |
| }; |
| |
| tim1_ch3n_pe12: tim1_ch3n_pe12 { |
| pinmux = <STM32_PINMUX('E', 12, AF0)>; |
| }; |
| |
| tim1_ch3_pe13: tim1_ch3_pe13 { |
| pinmux = <STM32_PINMUX('E', 13, AF0)>; |
| }; |
| |
| tim1_ch4_pe14: tim1_ch4_pe14 { |
| pinmux = <STM32_PINMUX('E', 14, AF0)>; |
| }; |
| |
| tim2_ch1_pa0: tim2_ch1_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF2)>; |
| }; |
| |
| tim2_ch2_pa1: tim2_ch2_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF2)>; |
| }; |
| |
| tim2_ch3_pa2: tim2_ch3_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF2)>; |
| }; |
| |
| tim2_ch4_pa3: tim2_ch4_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF2)>; |
| }; |
| |
| tim2_ch1_pa5: tim2_ch1_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF2)>; |
| }; |
| |
| tim2_ch1_pa15: tim2_ch1_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF2)>; |
| }; |
| |
| tim2_ch2_pb3: tim2_ch2_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF2)>; |
| }; |
| |
| tim2_ch3_pb10: tim2_ch3_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF2)>; |
| }; |
| |
| tim2_ch4_pb11: tim2_ch4_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF2)>; |
| }; |
| |
| tim3_ch1_pa6: tim3_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF1)>; |
| }; |
| |
| tim3_ch2_pa7: tim3_ch2_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF1)>; |
| }; |
| |
| tim3_ch3_pb0: tim3_ch3_pb0 { |
| pinmux = <STM32_PINMUX('B', 0, AF1)>; |
| }; |
| |
| tim3_ch4_pb1: tim3_ch4_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF1)>; |
| }; |
| |
| tim3_ch1_pb4: tim3_ch1_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF1)>; |
| }; |
| |
| tim3_ch2_pb5: tim3_ch2_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF1)>; |
| }; |
| |
| tim3_ch1_pc6: tim3_ch1_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF0)>; |
| }; |
| |
| tim3_ch2_pc7: tim3_ch2_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF0)>; |
| }; |
| |
| tim3_ch3_pc8: tim3_ch3_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF0)>; |
| }; |
| |
| tim3_ch4_pc9: tim3_ch4_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF0)>; |
| }; |
| |
| tim3_ch1_pe3: tim3_ch1_pe3 { |
| pinmux = <STM32_PINMUX('E', 3, AF0)>; |
| }; |
| |
| tim3_ch2_pe4: tim3_ch2_pe4 { |
| pinmux = <STM32_PINMUX('E', 4, AF0)>; |
| }; |
| |
| tim3_ch3_pe5: tim3_ch3_pe5 { |
| pinmux = <STM32_PINMUX('E', 5, AF0)>; |
| }; |
| |
| tim3_ch4_pe6: tim3_ch4_pe6 { |
| pinmux = <STM32_PINMUX('E', 6, AF0)>; |
| }; |
| |
| tim14_ch1_pa4: tim14_ch1_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF4)>; |
| }; |
| |
| tim14_ch1_pa7: tim14_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF4)>; |
| }; |
| |
| tim14_ch1_pb1: tim14_ch1_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF0)>; |
| }; |
| |
| tim15_ch1n_pa1: tim15_ch1n_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF5)>; |
| }; |
| |
| tim15_ch1_pa2: tim15_ch1_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF0)>; |
| }; |
| |
| tim15_ch2_pa3: tim15_ch2_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF0)>; |
| }; |
| |
| tim15_ch1_pb14: tim15_ch1_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF1)>; |
| }; |
| |
| tim15_ch1n_pb15: tim15_ch1n_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF3)>; |
| }; |
| |
| tim15_ch2_pb15: tim15_ch2_pb15 { |
| pinmux = <STM32_PINMUX('B', 15, AF1)>; |
| }; |
| |
| tim15_ch1_pf9: tim15_ch1_pf9 { |
| pinmux = <STM32_PINMUX('F', 9, AF0)>; |
| }; |
| |
| tim15_ch2_pf10: tim15_ch2_pf10 { |
| pinmux = <STM32_PINMUX('F', 10, AF0)>; |
| }; |
| |
| tim16_ch1_pa6: tim16_ch1_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF5)>; |
| }; |
| |
| tim16_ch1n_pb6: tim16_ch1n_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF2)>; |
| }; |
| |
| tim16_ch1_pb8: tim16_ch1_pb8 { |
| pinmux = <STM32_PINMUX('B', 8, AF2)>; |
| }; |
| |
| tim16_ch1_pe0: tim16_ch1_pe0 { |
| pinmux = <STM32_PINMUX('E', 0, AF0)>; |
| }; |
| |
| tim17_ch1_pa7: tim17_ch1_pa7 { |
| pinmux = <STM32_PINMUX('A', 7, AF5)>; |
| }; |
| |
| tim17_ch1n_pb7: tim17_ch1n_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF2)>; |
| }; |
| |
| tim17_ch1_pb9: tim17_ch1_pb9 { |
| pinmux = <STM32_PINMUX('B', 9, AF2)>; |
| }; |
| |
| tim17_ch1_pe1: tim17_ch1_pe1 { |
| pinmux = <STM32_PINMUX('E', 1, AF0)>; |
| }; |
| |
| /* UART_CTS / USART_CTS / LPUART_CTS */ |
| |
| usart1_cts_pa11: usart1_cts_pa11 { |
| pinmux = <STM32_PINMUX('A', 11, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pa0: usart2_cts_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_cts_pd3: usart2_cts_pd3 { |
| pinmux = <STM32_PINMUX('D', 3, AF0)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pa6: usart3_cts_pa6 { |
| pinmux = <STM32_PINMUX('A', 6, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pb13: usart3_cts_pb13 { |
| pinmux = <STM32_PINMUX('B', 13, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_cts_pd11: usart3_cts_pd11 { |
| pinmux = <STM32_PINMUX('D', 11, AF0)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart4_cts_pb7: usart4_cts_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RTS / USART_RTS / LPUART_RTS */ |
| |
| usart1_rts_pa12: usart1_rts_pa12 { |
| pinmux = <STM32_PINMUX('A', 12, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pa1: usart2_rts_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart2_rts_pd4: usart2_rts_pd4 { |
| pinmux = <STM32_PINMUX('D', 4, AF0)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb1: usart3_rts_pb1 { |
| pinmux = <STM32_PINMUX('B', 1, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pb14: usart3_rts_pb14 { |
| pinmux = <STM32_PINMUX('B', 14, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd2: usart3_rts_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart3_rts_pd12: usart3_rts_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF0)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart4_rts_pa15: usart4_rts_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart5_rts_pb5: usart5_rts_pb5 { |
| pinmux = <STM32_PINMUX('B', 5, AF4)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart5_rts_pe7: usart5_rts_pe7 { |
| pinmux = <STM32_PINMUX('E', 7, AF1)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart6_rts_pf3: usart6_rts_pf3 { |
| pinmux = <STM32_PINMUX('F', 3, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart7_rts_pd15: usart7_rts_pd15 { |
| pinmux = <STM32_PINMUX('D', 15, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart7_rts_pf2: usart7_rts_pf2 { |
| pinmux = <STM32_PINMUX('F', 2, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| usart8_rts_pd12: usart8_rts_pd12 { |
| pinmux = <STM32_PINMUX('D', 12, AF2)>; |
| bias-pull-up; |
| drive-open-drain; |
| }; |
| |
| /* UART_RX / USART_RX / LPUART_RX */ |
| |
| usart1_rx_pa10: usart1_rx_pa10 { |
| pinmux = <STM32_PINMUX('A', 10, AF1)>; |
| }; |
| |
| usart1_rx_pb7: usart1_rx_pb7 { |
| pinmux = <STM32_PINMUX('B', 7, AF0)>; |
| }; |
| |
| usart2_rx_pa3: usart2_rx_pa3 { |
| pinmux = <STM32_PINMUX('A', 3, AF1)>; |
| }; |
| |
| usart2_rx_pa15: usart2_rx_pa15 { |
| pinmux = <STM32_PINMUX('A', 15, AF1)>; |
| }; |
| |
| usart2_rx_pd6: usart2_rx_pd6 { |
| pinmux = <STM32_PINMUX('D', 6, AF0)>; |
| }; |
| |
| usart3_rx_pb11: usart3_rx_pb11 { |
| pinmux = <STM32_PINMUX('B', 11, AF4)>; |
| }; |
| |
| usart3_rx_pc5: usart3_rx_pc5 { |
| pinmux = <STM32_PINMUX('C', 5, AF1)>; |
| }; |
| |
| usart3_rx_pc11: usart3_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF1)>; |
| }; |
| |
| usart3_rx_pd9: usart3_rx_pd9 { |
| pinmux = <STM32_PINMUX('D', 9, AF0)>; |
| }; |
| |
| usart4_rx_pa1: usart4_rx_pa1 { |
| pinmux = <STM32_PINMUX('A', 1, AF4)>; |
| }; |
| |
| usart4_rx_pc11: usart4_rx_pc11 { |
| pinmux = <STM32_PINMUX('C', 11, AF0)>; |
| }; |
| |
| usart4_rx_pe9: usart4_rx_pe9 { |
| pinmux = <STM32_PINMUX('E', 9, AF1)>; |
| }; |
| |
| usart5_rx_pb4: usart5_rx_pb4 { |
| pinmux = <STM32_PINMUX('B', 4, AF4)>; |
| }; |
| |
| usart5_rx_pd2: usart5_rx_pd2 { |
| pinmux = <STM32_PINMUX('D', 2, AF2)>; |
| }; |
| |
| usart5_rx_pe11: usart5_rx_pe11 { |
| pinmux = <STM32_PINMUX('E', 11, AF1)>; |
| }; |
| |
| usart6_rx_pa5: usart6_rx_pa5 { |
| pinmux = <STM32_PINMUX('A', 5, AF5)>; |
| }; |
| |
| usart6_rx_pc1: usart6_rx_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF2)>; |
| }; |
| |
| usart6_rx_pf10: usart6_rx_pf10 { |
| pinmux = <STM32_PINMUX('F', 10, AF1)>; |
| }; |
| |
| usart7_rx_pc1: usart7_rx_pc1 { |
| pinmux = <STM32_PINMUX('C', 1, AF1)>; |
| }; |
| |
| usart7_rx_pc7: usart7_rx_pc7 { |
| pinmux = <STM32_PINMUX('C', 7, AF1)>; |
| }; |
| |
| usart7_rx_pf3: usart7_rx_pf3 { |
| pinmux = <STM32_PINMUX('F', 3, AF1)>; |
| }; |
| |
| usart8_rx_pc3: usart8_rx_pc3 { |
| pinmux = <STM32_PINMUX('C', 3, AF2)>; |
| }; |
| |
| usart8_rx_pc9: usart8_rx_pc9 { |
| pinmux = <STM32_PINMUX('C', 9, AF1)>; |
| }; |
| |
| usart8_rx_pd14: usart8_rx_pd14 { |
| pinmux = <STM32_PINMUX('D', 14, AF0)>; |
| }; |
| |
| /* UART_TX / USART_TX / LPUART_TX */ |
| |
| usart1_tx_pa9: usart1_tx_pa9 { |
| pinmux = <STM32_PINMUX('A', 9, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart1_tx_pb6: usart1_tx_pb6 { |
| pinmux = <STM32_PINMUX('B', 6, AF0)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa2: usart2_tx_pa2 { |
| pinmux = <STM32_PINMUX('A', 2, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pa14: usart2_tx_pa14 { |
| pinmux = <STM32_PINMUX('A', 14, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart2_tx_pd5: usart2_tx_pd5 { |
| pinmux = <STM32_PINMUX('D', 5, AF0)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pb10: usart3_tx_pb10 { |
| pinmux = <STM32_PINMUX('B', 10, AF4)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc4: usart3_tx_pc4 { |
| pinmux = <STM32_PINMUX('C', 4, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pc10: usart3_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart3_tx_pd8: usart3_tx_pd8 { |
| pinmux = <STM32_PINMUX('D', 8, AF0)>; |
| bias-pull-up; |
| }; |
| |
| usart4_tx_pa0: usart4_tx_pa0 { |
| pinmux = <STM32_PINMUX('A', 0, AF4)>; |
| bias-pull-up; |
| }; |
| |
| usart4_tx_pc10: usart4_tx_pc10 { |
| pinmux = <STM32_PINMUX('C', 10, AF0)>; |
| bias-pull-up; |
| }; |
| |
| usart4_tx_pe8: usart4_tx_pe8 { |
| pinmux = <STM32_PINMUX('E', 8, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart5_tx_pb3: usart5_tx_pb3 { |
| pinmux = <STM32_PINMUX('B', 3, AF4)>; |
| bias-pull-up; |
| }; |
| |
| usart5_tx_pc12: usart5_tx_pc12 { |
| pinmux = <STM32_PINMUX('C', 12, AF2)>; |
| bias-pull-up; |
| }; |
| |
| usart5_tx_pe10: usart5_tx_pe10 { |
| pinmux = <STM32_PINMUX('E', 10, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart6_tx_pa4: usart6_tx_pa4 { |
| pinmux = <STM32_PINMUX('A', 4, AF5)>; |
| bias-pull-up; |
| }; |
| |
| usart6_tx_pc0: usart6_tx_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF2)>; |
| bias-pull-up; |
| }; |
| |
| usart6_tx_pf9: usart6_tx_pf9 { |
| pinmux = <STM32_PINMUX('F', 9, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart7_tx_pc0: usart7_tx_pc0 { |
| pinmux = <STM32_PINMUX('C', 0, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart7_tx_pc6: usart7_tx_pc6 { |
| pinmux = <STM32_PINMUX('C', 6, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart7_tx_pf2: usart7_tx_pf2 { |
| pinmux = <STM32_PINMUX('F', 2, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart8_tx_pc2: usart8_tx_pc2 { |
| pinmux = <STM32_PINMUX('C', 2, AF2)>; |
| bias-pull-up; |
| }; |
| |
| usart8_tx_pc8: usart8_tx_pc8 { |
| pinmux = <STM32_PINMUX('C', 8, AF1)>; |
| bias-pull-up; |
| }; |
| |
| usart8_tx_pd13: usart8_tx_pd13 { |
| pinmux = <STM32_PINMUX('D', 13, AF0)>; |
| bias-pull-up; |
| }; |
| |
| }; |
| }; |
| }; |
