)]}' { "log": [ { "commit": "5784163e14db80f999a4269da2877215791e2617", "tree": "666c9c1acf1f8e890ece1b368ecb78902d7e21ce", "parents": [ "1e6f0cbabe1bce674eadb77814d98e2263823384" ], "author": { "name": "Kazu Hirata", "email": "kazu@google.com", "time": "Thu Sep 10 16:03:17 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 16:03:17 2026" }, "message": "[SizeOpts] Remove dead struct BasicBlockBFIAdapter (NFC) (#222536)\n\nThe last uses were removed on June 28, 2023 in commit\n80155cbf0be1744953edf68b9729c24bd0de79c4 when hotness/coldness queries\nwere refactored into templated ProfileSummaryInfo member functions.\n\nAssisted-by: Antigravity" }, { "commit": "1e6f0cbabe1bce674eadb77814d98e2263823384", "tree": "4194aa5e0299e0704f8dbee609d764a42a2762cf", "parents": [ "7962fc367a83caf8442a474660ab93ec5ed1ac22" ], "author": { "name": "Finn Plummer", "email": "mail@inbelic.dev", "time": "Thu Sep 10 16:00:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 16:00:53 2026" }, "message": "[NFC][SemaHLSL][CGHLSL] Move semantic classification to common `HLSL/SemanticSignatures` (#218058)\n\nUpdates SemaHLSL and CGHLSL to not use stringref compares to distinguish\nsemantics and converts them to a common `SemanticKind` enum.\n\nFurther, it moves the classification of valid shader stages into a\ncommon table to denote where a semantic is interpreted and how it is\nused to to derive if it is valid.\n\nThis also updates tests that were using invalid semantic constructs to\nuse corrected versions.\n\nThis is a pre-req for the signature packing issues (#205875, etc) and\n#189765\n\nAssisted by: Claude Opus 5 and GPT-5.6 Sol" }, { "commit": "7962fc367a83caf8442a474660ab93ec5ed1ac22", "tree": "6d0b4a1d3e95e16fc583913b139f8e5894daee62", "parents": [ "a4cff758b654b7c49c35e7445a025681b8e7a7f2" ], "author": { "name": "Keshav Vinayak Jha", "email": "31160700+keshavvinayak01@users.noreply.github.com", "time": "Thu Sep 10 15:57:36 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:57:36 2026" }, "message": "[AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (#217258)\n\nEnable GISel CSE in the legacy AMDGPU post-legalizer combiner so it\nmatches the new pass-manager path.\n\nUse the standard CSE configuration for the optimization level. Create\ncorrectly constrained virtual registers during legalization instead of\nmutating register classes after creation, and notify GlobalISel\nobservers when register operands are replaced. This also updates the\naffected GlobalISel checks.\n\nMore context:\nhttps://github.com/llvm/llvm-project/pull/216274#pullrequestreview-4964537468\n\n---------\n\nSigned-off-by: Keshav Vinayak Jha \u003ckeshavvinayakjha@gmail.com\u003e" }, { "commit": "a4cff758b654b7c49c35e7445a025681b8e7a7f2", "tree": "0578283dde79ed180d64f7efb816c8d43492d84f", "parents": [ "d5c0de99769824a032ef2f602f9939e28d259f06" ], "author": { "name": "Anshil Gandhi", "email": "95053726+gandhi56@users.noreply.github.com", "time": "Thu Sep 10 15:51:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:51:45 2026" }, "message": "[SandboxVec][VecUtils] Introduce DeadInstrMorgue (#221482)\n\nMove dead instructions collector and erasor into VecUtils, so that\nit is usable by both, BundleVec and LoadStoreVec, vectorizers. NFC" }, { "commit": "d5c0de99769824a032ef2f602f9939e28d259f06", "tree": "59ec8645d2e16de256059072f4b9dd821ccd868f", "parents": [ "fff83ec21990ed0bfee300f175b03317b1f709d6" ], "author": { "name": "Anirudh Mathur", "email": "126768505+AnirudhMathur12@users.noreply.github.com", "time": "Thu Sep 10 15:47:12 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:47:12 2026" }, "message": "[libc] Implement futimens (#222251)\n\nfutimens(fd, times) is implemented on Linux by delegating to\nthe utimensat system call.\n\nFixes #220764" }, { "commit": "fff83ec21990ed0bfee300f175b03317b1f709d6", "tree": "12f56b8b83e45bf45368a79f0f7aeaa9c6b75c16", "parents": [ "c47af0575fcfd5c3713ee009595500eb1ec0104b" ], "author": { "name": "Mariusz Sikora", "email": "mariusz.sikora@amd.com", "time": "Thu Sep 10 15:46:24 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:46:24 2026" }, "message": "[AMDGPU] Add gfx13 MC support for v_cvt_scale_pk32_* instructions (#222616)" }, { "commit": "c47af0575fcfd5c3713ee009595500eb1ec0104b", "tree": "127f5fae7a6dfba8dee30e7d3c1a6c63334c0a22", "parents": [ "3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb" ], "author": { "name": "Mariusz Sikora", "email": "mariusz.sikora@amd.com", "time": "Thu Sep 10 15:45:54 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:45:54 2026" }, "message": "[AMDGPU] Change physical VGPRs to 1024 for gfx13 (#222615)\n\nGFX13 has 1024 physical VGPRs per SIMD in wave32 (512 in wave64)" }, { "commit": "3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb", "tree": "703a89351f0ad390122771858e5fa555ce2e655f", "parents": [ "5777c75fd91efa7abce23a74c4ec2381e8084b44" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Thu Sep 10 15:37:35 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:37:35 2026" }, "message": "[LV] Strip unnecessary cl::opts from headers (NFC) (#221891)\n\nMark the ones which are static as such, strip declarations in headers to\navoid unnecessary dependencies, and nest the non-static ones under the\nllvm namespace." }, { "commit": "5777c75fd91efa7abce23a74c4ec2381e8084b44", "tree": "6cce3723146495afdfb5b5e7d1df592770ba365e", "parents": [ "8f100d2b11256fb538ace5ac45c9cd9be5d56335" ], "author": { "name": "Pablo Reble", "email": "pablo.reble@amd.com", "time": "Thu Sep 10 15:32:39 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:32:39 2026" }, "message": "[SLP][AMDGPU] Fix load-address typo in v4f16 combine tests (#222112)\n\nPatch addresses issue where tests are not performing 4 contiguous\nelements load/store chain as intended.\n\n- Correcting both typos (`%tmp6` vs. `%tmp10`) so each function\nrepresents a contiguous 4-element chain.\n- `copysign_combine_v4f16` and `canonicalize_combine_v4f16` now\nvectorize identically on `GFX8` and `GFX9`.\n- Adding `canonicalize_combine_v4f16_noncontiguous`, to preserve\nexisting test coverage, so the non-contiguous-gather path isn\u0027t silently\ndropped." }, { "commit": "8f100d2b11256fb538ace5ac45c9cd9be5d56335", "tree": "a04f7f136e9cbafad5aa891565ef52d6a753d19b", "parents": [ "4d09d062b4fb2e22f54b1125cbcea734efda81a8" ], "author": { "name": "Pablo Reble", "email": "pablo.reble@amd.com", "time": "Thu Sep 10 15:32:22 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:32:22 2026" }, "message": "[SLP][AMDGPU] Fix test to actually exercise count-check condition (#222022)\n\nThe gfx906 RUN lines in `inst-count-heuristic.ll` never exercised the\n`SLPInstCountCheck` heuristic they were meant to test.\nThis patch converts the test kernel from `i32` to `i16` elements so the\nheuristic\u0027s `getVectorFactor() \u003d\u003d 2` gate is actually reachable on\ngfx906, and adds a `-slp-inst-count-check\u003dfalse` RUN line to cover the\nnon-default behavior." }, { "commit": "4d09d062b4fb2e22f54b1125cbcea734efda81a8", "tree": "74ca4d122f52ab0f205c2d5e8663483c6241b56f", "parents": [ "3dfd0f8f396075678ae16f623eb01390b5b140d0" ], "author": { "name": "Nerixyz", "email": "nerixdev@outlook.de", "time": "Thu Sep 10 15:29:49 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:29:49 2026" }, "message": "[CodeView] Read and dump `S_ASSOCIATION` (#221034)\n\n`S_ASSOCIATION` associates one symbol with another one. Right now, it\u0027s\nonly used for coroutines. The `get_associatedSymbol*` functions from\n[`IDiaSymbol8`](https://learn.microsoft.com/en-us/visualstudio/debugger/debug-interface-access/idiasymbol8)\nuse this record. I\u0027m not sure if the VS debugger uses this at all.\n\nThe symbol value was added earlier, but we weren\u0027t able to read/write\nit. Also, lld would remove it when linking, as it didn\u0027t know if it\ncontained type indices.\n\nThis PR adds support for that. It\u0027s only visible in llvm-pdbutil where\nwe can dump it and roundtrip through yaml. I checked that it uses the\ncorrect format when used with the DIA dump sample.\n\nThe coroutine kind is still missing. It\u0027s contained in the flags of an\n`S_FRAMEPROC`. But it\u0027d like to wait for #215887 which touches the flags\nin YAML." }, { "commit": "3dfd0f8f396075678ae16f623eb01390b5b140d0", "tree": "775c4017b7f9e99903e9f723e3f445123c107aaa", "parents": [ "a726ed254aeaae71a92fddd094130b2e1588ce42" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 15:29:14 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:29:14 2026" }, "message": "[IRBuilder] Remove unused AllocTy argument (#222667)\n\nThis argument is not used at all. The size is explicitly passed in a\nseparate argument." }, { "commit": "a726ed254aeaae71a92fddd094130b2e1588ce42", "tree": "b97b3e1ab7d30ea5799819366fd09ef7f728ff14", "parents": [ "6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf" ], "author": { "name": "LU-JOHN", "email": "John.Lu@amd.com", "time": "Thu Sep 10 15:23:13 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:23:13 2026" }, "message": "[AMDGPU][NFC] Fix salu use to use SGPR (#222657)\n\nFix tests with \"salu_use\" in their name to use SGPRs.\n\nSigned-off-by: John Lu \u003cJohn.Lu@amd.com\u003e" }, { "commit": "6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf", "tree": "49f52c9b3f3614fbada4f9f4491f75678e45b39c", "parents": [ "fc6a6716ed7a0b90535ad2b02abff1b041cce542" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Sep 10 15:19:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:19:53 2026" }, "message": "[mlir][LLVM] Reuse a PCH for MLIRLLVMDialect (NFC) (#222578)\n\nBuild a private precompiled header from the LLVM dialect and LLVM IR\nheaders and use it for MLIRLLVMDialect. Build dialect libraries before\nconversions so the PCH is available early and repeated parsing is\navoided.\n\nRelative to the MLIRIR PCH parent, clean Release builds of LLVM and MLIR\nwith `ninja -j16` improved as follows:\n\n```\n wall: 420.41s -\u003e 398.79s (-5.14%)\n user: 6125.97s -\u003e 5789.14s (-5.50%)\n system: 481.88s -\u003e 455.05s (-5.57%)\n```\n\nAssisted-by: Codex" }, { "commit": "fc6a6716ed7a0b90535ad2b02abff1b041cce542", "tree": "104f4e02cf36a0b56e88928e0486fc2aaa808dbf", "parents": [ "b879ce97a1a7b097b5ed98468ced33d543af9558" ], "author": { "name": "Amir Ayupov", "email": "aaupov@fb.com", "time": "Thu Sep 10 15:07:09 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:07:09 2026" }, "message": "Promote BOLT from Office hours to Online Sync-Up (#222492)\n\nOffice hours are intended for chats with individual contributors:\n\u003e A number of experienced LLVM contributors make themselves available\nfor a chat on a regular schedule, to anyone who is looking for some\nguidance.\n\nBOLT community has outgrown office hours format and has been operating\nas sync-up.\nReflect that in the Getting Involved page." }, { "commit": "b879ce97a1a7b097b5ed98468ced33d543af9558", "tree": "220e4d07f5365554668adc037db73f864e0aaaa1", "parents": [ "f24c52bc14c55646ce37e8e5a6e5f174e896fbf4" ], "author": { "name": "David Spickett", "email": "david.spickett@arm.com", "time": "Thu Sep 10 15:05:55 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:05:55 2026" }, "message": "[compiler-rt][profdata] Use x86 triple in instrprof-debug-info-correlate-warnings.ll (#222668)\n\nTest added by #163254 / 28c048ec0f0a677115a0b00a88a7d013f925f2b8.\n\nIt has been failing in Armv8 (32-bit) builds since then. I\u0027m only just\ngetting to it.\n\nwarning: overriding the module target triple with\narmv8a-unknown-linux-gnueabihf [-Woverride-module]\n\u0027x86-64\u0027 is not a recognized processor for this target (ignoring\nprocessor)\n\u0027+cmov\u0027 is not a recognized feature for this target (ignoring feature)\n\u0027+cx8\u0027 is not a recognized feature for this target (ignoring feature)\n\u003c...\u003e\nerror: a.c:1:0: in function main i32 (): calling convention is\nhard-float, but floating-point registers are unavailable\n\nHappens on AArch64 too, but it\u0027s not fatal there. This happens because\nthe ll has x86 options in it, but the RUN used whatever the host triple\nwas.\n\nI don\u0027t know what\u0027s critical in this file, so I\u0027m adding a --target x86\noption to the test to fix this." }, { "commit": "f24c52bc14c55646ce37e8e5a6e5f174e896fbf4", "tree": "9bdd13f0c6c930941b6d6f4fe061392ab6dd672f", "parents": [ "746d09af26a84cdbe1e03aeb436c8ada09ac8ecf" ], "author": { "name": "Sohaib Iftikhar", "email": "sohaibiftikhar@google.com", "time": "Thu Sep 10 15:04:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 15:04:57 2026" }, "message": "[MLIR]: Fix format after #222671 (#222674)\n\n[MLIR]: Fix format after #222671" }, { "commit": "746d09af26a84cdbe1e03aeb436c8ada09ac8ecf", "tree": "bbcab8ab3f9bcc55c068c540c29f35e57b8df233", "parents": [ "847fb5cfde68fdea490171bc24087ebb0cd90738" ], "author": { "name": "Kai Nacke", "email": "kai.peter.nacke@ibm.com", "time": "Thu Sep 10 14:52:32 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:52:32 2026" }, "message": "[SystemZ][z/OS] Fix \"relative immediate relocation section mismatch\" (#222437)\n\nConstants should go inside the text section, but this is not explicitly\ncoded. In the test case, the EH table is generated into a PR section.\nThen the constant pool of function `fn_with_const_pool()` is emitted,\nwhich goes into the PR section of the EH table instead of the code\nsection. When the constant is later referenced in the code, the relative\noffset cannot be calculated because different sections are involved.\nThe fix is to explicitly return the text section for constants." }, { "commit": "847fb5cfde68fdea490171bc24087ebb0cd90738", "tree": "ef838ebdb347053ff6601f7a6e0ab0d22561622b", "parents": [ "5e497ce1838bd4448aa484262a00ce60c324ed4f" ], "author": { "name": "Amy Kwan", "email": "amy.kwan1@ibm.com", "time": "Thu Sep 10 14:38:30 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:38:30 2026" }, "message": "[llvm-ar][GOFF] Implement symbol attributes for GOFF archives (#214528)\n\nz/OS archive symbol table entries contain a 32-bit attribute word\nalongside each member offset.\n\nThe low three bits encode:\n```\n bit 2 (0x4): 64-bit addressing (AMODE 64)\n bit 1 (0x2): XPLink calling convention\n bit 0 (0x1): Writable Static Area (WSA)\n```\n\nPreviously in e2c8fa0, llvm-ar wrote zero for these attributes. This\npatch reads them from GOFF ESD\nrecords and stores them in a SymbolAttrs vector parallel to the existing\nSymbols vector in MemberData\nto emit the correct word per symbol.\n\nThese attributes are tested using `llvm-nm --print-armap` implemented in\n#214527 within the LIT test." }, { "commit": "5e497ce1838bd4448aa484262a00ce60c324ed4f", "tree": "c2f711d50f31fd1d7e5a881fbe654944698a1a6f", "parents": [ "af00b1753fe813df84e1c262fe48a215929ea1a3" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 14:32:03 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:32:03 2026" }, "message": "[OpenMP] Avoid use of ConstantExpr::getSizeOf() (#222662)\n\nSupport for this will be dropped as part of the ptradd migration.\nReplace with a constant size.\n\nWhile I\u0027m touching the code anyway, I also simplified the size\ncalculation a bit. It\u0027s computing both the size in bytes and in\nelements. Avoid doing an unnecessary division followed by multiply for\nthe size in bytes." }, { "commit": "af00b1753fe813df84e1c262fe48a215929ea1a3", "tree": "6a2caecc0414ba87563e75a1ca698cd71a12987b", "parents": [ "658872c4dffbe435042faee03672b5b03c620977" ], "author": { "name": "Sohaib Iftikhar", "email": "sohaibiftikhar@google.com", "time": "Thu Sep 10 14:31:46 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:31:46 2026" }, "message": "[BUILD]: Fix for #221812 (#222671)\n\n[BUILD]: Fix for #221812" }, { "commit": "658872c4dffbe435042faee03672b5b03c620977", "tree": "f7a8b0b8d99380fe3e8eb630a725e00d8bd195a5", "parents": [ "972a171dd102201089ea65673a72b832f29de297" ], "author": { "name": "Kai Nacke", "email": "kai.peter.nacke@ibm.com", "time": "Thu Sep 10 14:26:33 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:26:33 2026" }, "message": "[SystemZ][z/OS] Correctly align the constant pool and the PPA1 (#222128)\n\nBoth should be half-word aligned. However, testing revealed that both\ncan end up on odd addresses, which leads to relocation errors. Fix is to\nchange the alignment." }, { "commit": "972a171dd102201089ea65673a72b832f29de297", "tree": "fc6884dcc3962876fcb72beb015a6d351e21db9d", "parents": [ "29a48499738db1829f9a6b71a38bc4461867a3c4" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 14:26:30 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:26:30 2026" }, "message": "[InstCombine] Generate test checks (NFC) (#222670)\n\nWith UTC_ARGS --disable to preserve the declaration check lines\nat the end." }, { "commit": "29a48499738db1829f9a6b71a38bc4461867a3c4", "tree": "0857d623e9f35905501d13fddeb17d5b7f6bb420", "parents": [ "6b706509f983459f43708c42f80ec2f152a4cc42" ], "author": { "name": "Fateme Hosseini", "email": "Fhossein@qti.qualcomm.com", "time": "Thu Sep 10 14:21:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:21:52 2026" }, "message": "[Hexagon] Lower vreduce(min|max)((imum)?) (#211898)\n\nAdd custom lowering for VECREDUCE_FMIN/FMAX/FMINIMUM/FMAXIMUM on HVX\nfloat vector types. The target-independent default expansion reduces\nthese pairwise using the hardware min/max instruction directly, which\ndoes not implement IEEE-754 NaN-propagation semantics: a NaN in the\ninput can silently corrupt the reduction result, and an all-NaN input\nproduces a non-NaN value instead of NaN.\n\nThe custom lowering strips NaN elements to the appropriate neutral value\n(+/-Inf) before the pairwise tree reduction so a NaN can\u0027t corrupt other\nlanes, then fixes up the scalar result to NaN if every input element was\nNaN.\n\nFMINNUM/FMAXNUM on HVX vector types get the same treatment: NaN operands\nare replaced with the neutral value before delegating to the hardware\nmin/max, with a fixup to restore NaN when both operands were NaN (per\nllvm.minnum/maxnum semantics).\n\nCo-authored-by: Kaushik Kulkarni \u003ckauskulk@qti.qualcomm.com\u003e" }, { "commit": "6b706509f983459f43708c42f80ec2f152a4cc42", "tree": "2ba5e18808dc81ffe60694b2b89dc62bb6e53c71", "parents": [ "e6e102aa9ee5f8163d6d300614734b6c009aec34" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Sep 10 14:20:50 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:20:50 2026" }, "message": "[mlir] Reuse a precompiled header for MLIRIR (NFC) (#222576)\n\nBuild a private precompiled header from the common MLIR IR headers and\nuse it for MLIRIR. Build Support and IR first so the PCH is available\nearly, and qualify the LLVM LSP Location name that the broader header\nsurface exposes.\n\nOn current main, clean Release builds of LLVM and MLIR with `ninja -j16`\nimproved as follows:\n\n```\n wall: 535.99s -\u003e 420.41s (-21.56%)\n user: 7550.29s -\u003e 6125.97s (-18.86%)\n system: 569.85s -\u003e 481.88s (-15.44%)\n```\n\nAssisted-by: Codex" }, { "commit": "e6e102aa9ee5f8163d6d300614734b6c009aec34", "tree": "f5ed146ff6787e4ada7c7491a4af9d208d065c03", "parents": [ "26c633bf88337258f1b488bccfd74faa1efbafaa" ], "author": { "name": "Aiden Grossman", "email": "aidengrossman@google.com", "time": "Thu Sep 10 14:17:32 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:17:32 2026" }, "message": "[Passes] Add DisableSimplifyLibCalls flag to runCodeGenPipeline (#222430)\n\nThis enables this abstraction to be a drop-in replacement for rustc\nafter some minor refactoring." }, { "commit": "26c633bf88337258f1b488bccfd74faa1efbafaa", "tree": "e61fd3eea4383387f80791da3c062733b91b5524", "parents": [ "659faef7717be80c12e47604e61c01f2d7fc4975" ], "author": { "name": "Nerixyz", "email": "nerixdev@outlook.de", "time": "Thu Sep 10 14:13:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 14:13:21 2026" }, "message": "[lldb] Move most PDB shell tests to NativePDB (#222370)\n\nI plan to remove the DIA PDB plugin before the 24 release - we switched\nthe default to the native one in 22. To avoid losing test coverage in\nthe process, this moves the SymbolFile/PDB tests to\nSymbolFile/NativePDB. They were already running with both plugins. In\nsome cases, we set `env LLDB_USE_NATIVE_PDB_READER\u003d1`, which I flipped.\n\nThe remaining shell tests are:\n- `func-symbols.test`: Has a duplicate in NativePDB with different\nchecks, because the two plugins don\u0027t create identical types (see\ncomment in test)\n- `udt-layout.test`: Also has a duplicate with different checks, because\nthe two plugins show the base classes in a different order.\n\nOther than that, there\u0027s also a [unittest for\nPDB](https://github.com/llvm/llvm-project/blob/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14/lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp).\nI\u0027m not sure what we should do about it. Looking over the tests there,\nmost of these are already covered by the shell tests." }, { "commit": "659faef7717be80c12e47604e61c01f2d7fc4975", "tree": "e19eddb1128a605f68a5ab00a9826390b0060e4e", "parents": [ "28d39b47e98af5a6fd8dc676f9ef576fe4b30724" ], "author": { "name": "Sergei Druzhkov", "email": "serzhdruzhok@gmail.com", "time": "Thu Sep 10 13:51:51 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:51:51 2026" }, "message": "[lldb-dap] Add paging into modules request (#222122)\n\nAdded support for modules paging according to [DAP\nspecification](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Modules)" }, { "commit": "28d39b47e98af5a6fd8dc676f9ef576fe4b30724", "tree": "ad45a2524178c27d9b5819a3cb4a1619ec84ee45", "parents": [ "3c478e1597c11abbdafef9c08d7e11655ba1cdd5" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 13:47:14 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:47:14 2026" }, "message": "CodeGen: Remove dead LiveVariables plumbing from MachineSink (#222563)\n\nMachineSink threaded a LiveVariables pointer through to\nSplitCriticalEdge so the analysis would be updated. It never used\nLiveVariables for any decision, and MachineSinking runs before\nLiveVariables in every pipeline.\n\nCo-authored-by: Claude (Claude-Opus-4.8)" }, { "commit": "3c478e1597c11abbdafef9c08d7e11655ba1cdd5", "tree": "f91f4e3bd79148993000f9091387ddbfe00c1109", "parents": [ "fb69e1dcea0e527647525240af45a87420a3a593" ], "author": { "name": "Kai Nacke", "email": "kai.peter.nacke@ibm.com", "time": "Thu Sep 10 13:46:16 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:46:16 2026" }, "message": "[SystemZ][z/OS] Relax check for additional symbols in PR section (#222435)\n\nThe current check in `emitLabel()` is too strict. Inside a PR, there\ncannot be no other external visible label. However, temporary labels\nwhich are used e.g. for calculating offsets can be emitted. A situation\nin which this occurs is the emission of the DWARF EH tables, in which a\ntemporary symbol (with an empty name) is emitted at the begin of the\ntable, causing an error message. This change limits the error to\nnon-temporary labels." }, { "commit": "fb69e1dcea0e527647525240af45a87420a3a593", "tree": "f7e6f5e8c9ae2c545f955e11168d79a1a35606df", "parents": [ "a774efbad6f74d695e37841c72b2a0175e4724e9" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 13:42:22 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:42:22 2026" }, "message": "AMDGPU: Query waves-per-EU and flat-wg range from subarch in attributor (#222596)\n\nThe maximum flat work group range is a pair of constants and the maximum\nwaves per execution unit is fully known from the subarch. Use TargetParser \ninformation and continue working to remove the dependence on codegen.\n\nCo-authored-by: Claude (Opus 4.8) \u003cnoreply@anthropic.com\u003e" }, { "commit": "a774efbad6f74d695e37841c72b2a0175e4724e9", "tree": "04025a5724837467c276f728068f102121b7add7", "parents": [ "148604aed3511a41af5e000b0440e0afb884daa6" ], "author": { "name": "Nikolas Klauser", "email": "nikolasklauser@berlin.de", "time": "Thu Sep 10 13:40:37 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:40:37 2026" }, "message": "[libc++] Add [[gnu::warn_unused]] to a bunch of threading utilities (#213963)" }, { "commit": "148604aed3511a41af5e000b0440e0afb884daa6", "tree": "826334ee29fcc9f5096716f1cdb675adf97a3582", "parents": [ "d7f2abda7020b4ca336732dd2984f6a668fd766a" ], "author": { "name": "Vy Nguyen", "email": "1762963+oontvoo@users.noreply.github.com", "time": "Thu Sep 10 13:38:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:38:52 2026" }, "message": "[bazel]Add missing utils/extract_symbols.py (#222653)\n\nThis was added in https://github.com/llvm/llvm-project/pull/221296" }, { "commit": "d7f2abda7020b4ca336732dd2984f6a668fd766a", "tree": "fc26a604afa81ba2c233af6a729e8381a7618695", "parents": [ "da15729d2108024fc2e65fdcb17143393823d6a3" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Thu Sep 10 13:33:59 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:33:59 2026" }, "message": "[SCEV] Use the refined BE-count formula if the addition cannot overflow (#221227)\n\nGeneralize the logic added in\nhttps://github.com/llvm/llvm-project/pull/218694\nto consider AddingStrideMinusOneMayOverflow (was MayAddOverflow) instead\nof just the !IVMayOverflow part.\n\nThis handles 2 additional cases when Start \u003c RHS:\n * Stride is known power-of-2:\n * Start \u003d\u003d Stride and Start \u003d\u003d Stride -1.\n\nThe patch includes a mechanical change to move up the existing\nMayAddOverflow with comments, and clarifies the name to\nAddingStrideMinusOneMayOverflow.\n\nThis improves trip count computations in a number of real-world cases:\nhttps://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1195.\n\nEnd-to-end Alive2 Proofs for both cases in unsigned:\nhttps://alive2.llvm.org/ce/z/MQ2YLf\n\nPR: https://github.com/llvm/llvm-project/pull/221227" }, { "commit": "da15729d2108024fc2e65fdcb17143393823d6a3", "tree": "92b4c1e2173b54517c7a34b02b51eace030633fb", "parents": [ "41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a" ], "author": { "name": "Kieran B", "email": "kieran.bailey@arm.com", "time": "Thu Sep 10 13:29:30 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:29:30 2026" }, "message": "[AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (#218950)\n\nCurrently, the stack allocation algorithm can order spilled ZPR\ncallee-saves in a way that prevents pairing.\n\nReorder ZPR callee-saves before frame indices are assigned to maximize\npairing opportunities. Pairing requires consecutive even/odd registers\nat even stack offsets.\nThe remaining legality requirements are already checked when the\nregister pairs are formed.\n\nThe reordering algorithm primarily works by determining the parity of\nthe lowest ZPR spill offset. If the offset is odd, it places one\nunpaired ZPR spill first so that subsequent register pairs begin at even\noffsets.\n\nWindows is not supported by this reordering algorithm for now, to keep\nthis change minimal.\n\nNew tests have been added to sve-callee-save-restore-pairs.ll to test\nthe reordering algorithm." }, { "commit": "41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a", "tree": "2223b142fb94f980ecfff724919ba24902afc0b4", "parents": [ "8be8161a037daf2417c669336b777e986d0fc21f" ], "author": { "name": "Venkatesh Srinivasan", "email": "156861430+venk-ks@users.noreply.github.com", "time": "Thu Sep 10 13:26:28 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:26:28 2026" }, "message": "[Clang][Sema] Add fortify warnings for strlcpy (#221325)\n\nAdd `-Wfortify-source` diagnostics for `strlcpy` and `__builtin_strlcpy`\nwhen the size argument exceeds the destination buffer size.\n\nThis is directly analogous to the previous PR for `strlcat` (#220341).\n\nAlso update `clang/test/Sema/warn-strlcpycat-size.c` and\n`clang/test/Sema/builtins.c` to expect the `-Wfortify-source` warnings\nwhere test calls pass sizes larger than the destination buffer capacity.\n\nPart of #142230\n\nAssisted-by: Gemini" }, { "commit": "8be8161a037daf2417c669336b777e986d0fc21f", "tree": "6d86d457e198a72b542f23057e84c854f2b27fcf", "parents": [ "36fe08a5f92230655dd9662f121c092ced307ddd" ], "author": { "name": "Marcos Maronas", "email": "mmaronas@amd.com", "time": "Thu Sep 10 13:17:54 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:17:54 2026" }, "message": "[clang][CodeGen] Stop overriding GlobalVariable\u0027s default address space (#222367)\n\nThe `GlobalVariable` constructor used by `createGlobal` receives a\n`std::optional\u003cunsigned\u003e AddressSpace` that, when unspecified, falls\nback to `M.getDataLayout().getDefaultGlobalsAddressSpace()`. However,\n`createGlobal`\u0027s `AddressSpace` arg was a bare `unsigned` defaulting to\n0. By doing that, it was effectively overriding the `GlobalVariable`\u0027s\nconstructor fallback with 0. On targets whose default globals address\nspace is not 0 (AMDGPU, SPIR/SPIR-V), this emitted\n`@llvm.global_ctors/dtors` in address space 0 causing some issues (see\nhttps://github.com/ROCm/SPIRV-LLVM-Translator/issues/293)." }, { "commit": "36fe08a5f92230655dd9662f121c092ced307ddd", "tree": "168f1051d8e439b2eae49afe5a872329c6a71b4b", "parents": [ "c363b393529bc652c97344042a3b5e6f136d41c5" ], "author": { "name": "Erich Keane", "email": "ekeane@nvidia.com", "time": "Thu Sep 10 13:06:05 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:06:05 2026" }, "message": "[MLIR][CIR][NFCI] Split TestAliasAnalysis into its own library (#222174)\n\nThis is a target for the CIR alias analysis, and bringing in all of the\nMLIRTestAnalysis is too heavy: it results in a significant increase in\nCIR test size. This patch, plus a few little things, gets us ~850 edges\nremoved from the Clang Build (after Medhi\u0027s patches).\n\nThis also has CIR use it." }, { "commit": "c363b393529bc652c97344042a3b5e6f136d41c5", "tree": "be0675874f9447ed127cbb3e088b6f4f03b324fb", "parents": [ "c69a5ebf6b961d1296cb42a104008df40cf3bc36" ], "author": { "name": "Sander de Smalen", "email": "sander.desmalen@arm.com", "time": "Thu Sep 10 13:02:20 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 13:02:20 2026" }, "message": "[SLP] NFC: Remove redundant expression from getBuildVectorCost (#222547)\n\nGathers is initialized with the contents from VL and then not modified,\nso `VL.equals(Gathers)` is always true." }, { "commit": "c69a5ebf6b961d1296cb42a104008df40cf3bc36", "tree": "2301fc596f3d99cb5dd35c94380e38d3d913f9af", "parents": [ "14789f78610ab6caa79d18737185755c199e0f95" ], "author": { "name": "Nikolas Klauser", "email": "nikolasklauser@berlin.de", "time": "Thu Sep 10 12:57:59 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:57:59 2026" }, "message": "[libc++] Simplify the implementation of std::declval (#222303)\n\nThe implementation of `std::declval` calling `__declval` was originally\nintroduced for improved compile times. However, we now have a builtin\nfor `add_rvalue_reference`, which makes the old implementation faster\nagain, since we avoid instantiating any class types _and_ avoid overload\nresolution." }, { "commit": "14789f78610ab6caa79d18737185755c199e0f95", "tree": "fd7ba67617dc788b2699ee7a7fd8641f1a112f1a", "parents": [ "3ec60e826f522bbe6b0af7c9392968a9f6c660c5" ], "author": { "name": "Lang Hames", "email": "lhames@gmail.com", "time": "Thu Sep 10 12:54:06 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:54:06 2026" }, "message": "[orc-rt] Generalize testcases for different target archs (#222629)\n\nDrop the hard-coded archs from the check-rt-process-info testcases.\nInstead, check against an arch value derived from the build\u0027s target\ntriple." }, { "commit": "3ec60e826f522bbe6b0af7c9392968a9f6c660c5", "tree": "8fa996729089b684fc520cc827207ae0209ef77c", "parents": [ "0afee5c04021a2c8218beb6a64f3afd5f2578c02" ], "author": { "name": "Joseph Huber", "email": "huberjn@outlook.com", "time": "Thu Sep 10 12:36:39 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:36:39 2026" }, "message": "[libc] Optimize the GPU printf implementation with size hints (#222474)\n\nSummary:\nThe GPU printf interface is functionally a shim to pass a `va_list` and\nformat string to the CPU for formatting. The size of the argument list\nisn\u0027t exposed by the C ABI, but we can use `__builtin_object_size` to\ntry to look it up. This will bind to the `alloca` holding our arguments\nin the ABI and return a positive size if it is known.\n\nWe do this opportunistically, as the check is lossy. In cases where it\nis known, this saves a stack spill to store the true size. Additionally,\nwe can use this to detect cases where `printf` is being used as a simple\n`puts`.\n\nThis saves 10 VGPRs for the `printf(\"string\")` case. It also saves 8\nbytes of stack in most all cases." }, { "commit": "0afee5c04021a2c8218beb6a64f3afd5f2578c02", "tree": "49fe37dd76bdc53daf020a6543b2237108e20369", "parents": [ "21d80e82d137f9a30e2626a9953d63015bcb280c" ], "author": { "name": "Dan Blackwell", "email": "dan_blackwell@apple.com", "time": "Thu Sep 10 12:23:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:23:57 2026" }, "message": "[Darwin][TSan] Use deadlock detector aware calls for Darwin-specific lock interceptors (#216040)\n\nCurrently the deadlock detector is unaware of these lock types because\nthe interceptors use bare Acquire-Release calls. This patch switches\nthem over to the Mutex(Pre|Post)Lock calls instead.\n\nAssisted by: Claude\n\nrdar://155410097" }, { "commit": "21d80e82d137f9a30e2626a9953d63015bcb280c", "tree": "7fdf917ee8f44cdef51bd85afdb90335652635ab", "parents": [ "b3eab3a932118c3a462741000d2118428f5bd268" ], "author": { "name": "Lang Hames", "email": "lhames@gmail.com", "time": "Thu Sep 10 12:18:18 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:18:18 2026" }, "message": "[orc-rt] Remove redundant extern keyword. (#222619)\n\norc_rt_log_OSLogHandles is already extern via ORC_RT_C_EXPORT." }, { "commit": "b3eab3a932118c3a462741000d2118428f5bd268", "tree": "cd00d7014b61225ccbeaab8caa2ebaec069c9aa8", "parents": [ "3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c" ], "author": { "name": "lorenzo chelini", "email": "l.chelini@icloud.com", "time": "Thu Sep 10 12:11:22 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:11:22 2026" }, "message": "[mlir][vector] Fix mask neutral value for masked fmaximum/fminimum reductions (#222275)\n\nMasked maximumf/minimumf reductions were lowered by replacing inactive\nlanes with a neutral value before applying an unmasked reduction. The\nmaximumf neutral was incorrectly set to the negative subnormal closest\nto zero, causing it to beat any negative active value. Similarly,\nminimumf used FLT_MAX, which loses to an active +Inf.\nThis change adds LLVM dialect support for\nllvm.vp.reduce.fmaximum/fminimum and lowers masked reductions directly\nto these predicated intrinsics." }, { "commit": "3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c", "tree": "41540df8f2eef3f5da6e9d7ac4aacc20426052df", "parents": [ "cb46e8530f3c45be6f968fcdef47f37e5220fe95" ], "author": { "name": "jeanPerier", "email": "jperier@nvidia.com", "time": "Thu Sep 10 12:05:47 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 12:05:47 2026" }, "message": "[flang] add AllocationPolicy attribute to module and use it in InlineHLFIRCopy (#222013)\n\nThe StackArrays/AllocationPlacement pass cannot move fir.allocmem\ncreated during InlineHLFIRCopy for the copy-in/cop-out buffers because\nof there placement in branches.\n\nMoving these allocmem outside of the branches is suboptimal as these\nallocations may never occur at runtime (when the data is actually\nalready contiguous).\nExtending the StackArrays pass is doable but very tedious (the data flow\nanalysis passes used in the pass cannot recognized \"same\npredicates\"/understand that the two fir.if block that\nallocate/deallocates will be both reached or never reached (even when\nmodifying InlineHLFIRCopy to use the same SSA value for both fir.if). So\nthis requires custom logic, and was adding 200 lines of non trivial code\nto audit and I did not like it.\n\nI decided to expose the allocation policy so that other passes can rely\non it. To make it the most flexible and future proof this is done via a\nnew module attribute instead of threading options in the driver to this\nand that pass. This way, it will also be possible to have custom per\nfunction policy if ever needed.\n\nThe InlineHLFIRCopy is updated to apply the small array threshold policy\n(that decide when constant size arrays should always be placed on the\nstack, regardless of the -fstack-array/-fno-stack-array). I also\nincreased this threshold from 64 to 1024 so that it cover my application\nuse case. This increase is in line with the industry practice (NV, IFX,\nand gfortran will all allocate few Kb temporary copy-in/out buffers on\nthe stack, regardless of the optimization level). For now, I decided to\nnot apply the `-fstack-array` aspect as it is on by default with flang\nand I want to measure the effect first before doing so (gfortran/ifx\nalso control dynamic copy-in/out buffer allocations with the stack-array\nrelated flag, so there is a good chance we end-up doing it at some\npoint)." }, { "commit": "cb46e8530f3c45be6f968fcdef47f37e5220fe95", "tree": "88322fd5edf090d7b37f8ee858234d9f7f1ff676", "parents": [ "46f9c228668a406cec6160552dea699846d91fd6" ], "author": { "name": "Thrrreeee", "email": "shijinrui@bytedance.com", "time": "Thu Sep 10 11:56:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:56:45 2026" }, "message": "[JITLink][RISCV] Avoid quadratic removal of alignment edges (#222317)\n\nWe encountered this issue while using BOLT to instrument clang on\nRISC-V. JITLink spent significant time removing alignment edges during\nrelaxation finalization in large code blocks with many alignment\nrelocations.\n\nDuring RISC-V relaxation finalization, finalizeBlockRelax removes\nAlignRelaxable edges individually from a block\u0027s edge vector. Each erase\nshifts the remaining suffix, making this cleanup quadratic when the\nnumber of alignment edges grows with the total edge count.\n\nCompact surviving edges once and remove the trailing entries from the\nback, preserving edge order and making cleanup linear. Count the\ntrailing entries before erasing to avoid comparing an invalidated\niterator.\n\n\nThese results support the performance benefit, but they come from\n**GPT-generated** synthetic benchmarks and do not represent speedups on\nreal BOLT workloads.\n\ncount | origin | new\n-- | -- | --\n16,384 | 92.6 ms | 6.2 ms\n32,768 | 430.0 ms | 9.5 ms\n65,536 | 1,732.3 ms | 16.2 ms\n\nAssisted by GPT-6." }, { "commit": "46f9c228668a406cec6160552dea699846d91fd6", "tree": "080f63d6c64c478a9ba04034137f40f7df7fcae5", "parents": [ "cc45d4f54199e005db594c22cf29545a0d020bae" ], "author": { "name": "Farzon Lotfi", "email": "farzonlotfi@microsoft.com", "time": "Thu Sep 10 11:54:47 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:54:47 2026" }, "message": "[Scalarizer] Update tests to use update_test_checks.py (#222460)\n\nThis PR is to address feedback on this comment:\nhttps://github.com/llvm/llvm-project/pull/221033#discussion_r3973313815\n\nrequesting the tests use utils/update_test_checks.py instead." }, { "commit": "cc45d4f54199e005db594c22cf29545a0d020bae", "tree": "458cb3e8d1103c27be916b84071911baeaffa4c2", "parents": [ "e4d40831076278ffbfc7d883510d49db8fbfaa7c" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Thu Sep 10 11:51:26 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:51:26 2026" }, "message": "[CostModel][X86] clmul.ll - add test coverage for vpclmulqdq targets (#222610)" }, { "commit": "e4d40831076278ffbfc7d883510d49db8fbfaa7c", "tree": "6411a0724c07e5288abf3eb57cf07e9df09deef1", "parents": [ "11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1" ], "author": { "name": "Abid Qadeer", "email": "haqadeer@amd.com", "time": "Thu Sep 10 11:49:12 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:49:12 2026" }, "message": "[OpenMP] Give the device shared memory allocations a debug location. (#221842)\n\nFixes https://github.com/llvm/llvm-project/issues/221831.\n\nIn generic mode on the device, the buffers that carry values into an\noutlined region come from device shared memory rather than the stack, so\nthey are emitted as calls to `__kmpc_alloc_shared` and\n`__kmpc_free_shared`. Those are definitions in the DeviceRTL, which\nmakes them inlinable calls, and the verifier requires an inlinable call\nin a function with debug info to carry a !dbg location. None of these\ncalls had one, for two separate reasons.\n\n1. `allocateVar()` and `deallocateVar()` took a bare insertion point, so\nan override had no debug location to set on the runtime calls it emits\nin place of the alloca the base class would have created. Fixed by\nadding a `DebugLoc` parameter that carries one.\n\n2. The `createOMPAllocShared `and `createOMPFreeShared` calls in\n`createParallel` relied on the implicit conversion from an insertion\npoint to a `LocationDescription`, which selects the constructor that\nleaves the debug location empty, and `updateToLocation` then installs\nthat empty location over whatever the builder had. Fixed by passing the\n`Builder`, which carries the debug location along with the insertion\npoint. This is the same fix as #218961.\n\n---------\n\nCo-authored-by: Cursor \u003ccursoragent@cursor.com\u003e" }, { "commit": "11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1", "tree": "1f9d308319f340aeec02cf5420d9f70ea5d3c645", "parents": [ "73f0077ff60c58cae6c1f753b046ce93ebc4db3f" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Thu Sep 10 11:46:48 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:46:48 2026" }, "message": "[NATVIS] Fix ConstantInt APInt value access (#221719)\n\nEnsure we peek through the APInt::U VAL / *pVal union" }, { "commit": "73f0077ff60c58cae6c1f753b046ce93ebc4db3f", "tree": "aa672cd38d4f7a675d9556874b41e1e04a5dab77", "parents": [ "38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce" ], "author": { "name": "Timm Baeder", "email": "tbaeder@redhat.com", "time": "Thu Sep 10 11:36:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:36:57 2026" }, "message": "Revert \"[clang][bytecode] Use opaque pointers for decl-based dummy pointers\" (#222599)\n\nReverts llvm/llvm-project#220917\n\nLooks like this breaks some memory-sanitizier builders:\nhttps://lab.llvm.org/buildbot/#/builders/169/builds/26405\nhttps://lab.llvm.org/buildbot/#/builders/164/builds/25236" }, { "commit": "38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce", "tree": "97c41c49e37e587cb9bae95db6824d729c426217", "parents": [ "26012d67fef70763f6593eacfe2af41272cf7b72" ], "author": { "name": "Hassnaa Hamdi", "email": "hassnaa.hamdi@arm.com", "time": "Thu Sep 10 11:36:11 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:36:11 2026" }, "message": "[LV][NFC] Move up getEpilogueTailLowering() (#222358)\n\nThis patch only moves up `getEpilogueTailLowering()` so that it can be\nused by `planForEpilogueTF` as needed here: https://github.com/llvm/llvm-project/pull/208764" }, { "commit": "26012d67fef70763f6593eacfe2af41272cf7b72", "tree": "acd7b25ec833aa46f1b1620721d641653f101df4", "parents": [ "abf3bd63bb37d00aa4cd8b5dad873e1140d06348" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Thu Sep 10 11:33:34 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:33:34 2026" }, "message": "[CostModel][X86] Add baseline cost test for pdep/pext intrinsics (#222603)\n\nSlow pdep/pext targets in particular are highly inaccurate" }, { "commit": "abf3bd63bb37d00aa4cd8b5dad873e1140d06348", "tree": "d85a23c0619871d1ce4ab5425225fcab73a59600", "parents": [ "e2955810d33ea0fb04522fc9f7cb12b71088ccc8" ], "author": { "name": "Yaxun (Sam) Liu", "email": "yaxun.liu@amd.com", "time": "Thu Sep 10 11:23:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:23:52 2026" }, "message": "[clang][DebugInfo] Fix verbose trap source line (#222456)\n\nThe artificial inline location for `__builtin_verbose_trap` used line\nzero. As a result, the emitted trap could inherit the preceding source\nline in DWARF line tables.\n\nKeep the artificial trap-message frame while assigning the builtin\ncall\u0027s line and column to the trap instruction." }, { "commit": "e2955810d33ea0fb04522fc9f7cb12b71088ccc8", "tree": "f3796158371db22368b0b1dd8aa668a63843f0a1", "parents": [ "05e74e7b5e065d05e33efd264e6f42d9cd40f06c" ], "author": { "name": "Sohaib Iftikhar", "email": "sohaibiftikhar@google.com", "time": "Thu Sep 10 11:09:14 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:09:14 2026" }, "message": "[MLIR]: Fix test after 70f5696e (#222601)\n\n[MLIR]: Fix test after 70f5696e" }, { "commit": "05e74e7b5e065d05e33efd264e6f42d9cd40f06c", "tree": "12ee98a2301c72caa3577c576c92eb7109bdbba7", "parents": [ "f3909e073dd93f830f842c0bfe33b443b8fa0624" ], "author": { "name": "Anutosh Bhat", "email": "andersonbhat491@gmail.com", "time": "Thu Sep 10 11:08:03 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:08:03 2026" }, "message": "[opt] Move InitLLVM ownership to the standalone entry point (#222559)\n\nPlease Read: [RFC: Embeddable LLVM tool drivers for long-lived\nhosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)\nand [Why `InitLLVM` ownership matters section in the\nRFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)\n\n`LLVMOptDriver` is already separated from the standalone `opt`\nexecutable, but `optMain` currently constructs `InitLLVM` internally.\nThis means its destructor calls `llvm_shutdown()` whenever one driver\ninvocation finishes.\n\nThat is appropriate for a standalone executable, but not for a reusable\ndriver called by a long-lived host. For example,\n[WasmBolt](https://github.com/anutosh491/WasmBolt) (try\n[here](https://anutosh21.github.io/WasmBolt/)) invokes `opt`, `llc`,\nClang and LLD within one browser-hosted LLVM process and needs the LLVM\nprocess state to remain alive between tool invocations.\n\nThis patch moves `InitLLVM` ownership into `opt.cpp`:\n\n```text\nstandalone opt:\n main -\u003e InitLLVM -\u003e optMain -\u003e shutdown\n\nembedded host:\n host-owned InitLLVM / LLVMToolSession -\u003e optMain\n```\n\nStandalone opt therefore keeps the same lifetime and behaviour, while\nLLVMOptDriver can borrow the lifetime owned by an embedding application.\n\nThis patch is independent of the proposed `LLVMToolSession `and\n`LLVMLlcDriver` changes that I\u0027ve proposed in the RFC and can be\nreviewed separately." }, { "commit": "f3909e073dd93f830f842c0bfe33b443b8fa0624", "tree": "90cb59669285cfd7bbcfc73016eb301f6a1f7345", "parents": [ "5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360" ], "author": { "name": "ioana ghiban", "email": "ioana.ghiban@arm.com", "time": "Thu Sep 10 11:04:11 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:04:11 2026" }, "message": "[MLGO] Gate model tests on optimization-specific lit features (#217906)\n\n### Context\n\n`have_mlir_lowering` only indicates that `LLVM_MLGO_MODELS` is\nnon-empty. It does not identify which model type was compiled.\n\n### Motivation\n\nAn inliner-only configuration incorrectly enabled regalloc-specific test\ncommands, and vice versa.\n\n### Changes\n\nAdd `have_mlir_lowering_inliner` and `have_mlir_lowering_regalloc` lit\nfeatures derived from the corresponding model-generation targets. Update\nMLGO tests to use the appropriate model-specific feature, including GN\nconfiguration defaults.\n\n\nI leveraged AI to write this PR." }, { "commit": "5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360", "tree": "49d58b21baee8f1768d8956657d7a8ca35ae9092", "parents": [ "bc25ad46580963afb2056b929b1089133d006dbb" ], "author": { "name": "Keshav Vinayak Jha", "email": "31160700+keshavvinayak01@users.noreply.github.com", "time": "Thu Sep 10 10:59:12 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:59:12 2026" }, "message": "[AMDGPU][GISel] Notify GISel observers when splitting trap blocks (#219128)\n\n`legalizeTrapEndpgm` can split a MBB and move the instructions following\na trap. Since an instruction\u0027s parent block is part of its GISel CSE\nprofile, notify active observers around the moved instructions so they\nare re-profiled with the new parent block.\n\nCSE consistency gap exposed by #217258.\n\nAssisted-by: Codex\n\n---------\n\nSigned-off-by: Keshav Vinayak Jha \u003ckeshavvinayakjha@gmail.com\u003e\nCo-authored-by: GPT-5 Codex \u003cnoreply@openai.com\u003e" }, { "commit": "bc25ad46580963afb2056b929b1089133d006dbb", "tree": "6c06629c3ff6740475c019e354a7cb9efd7a45b5", "parents": [ "c52a3432d6a8187dd0f22ad1f8fde6774167dc89" ], "author": { "name": "Gil Rapaport", "email": "gil.rapaport@mobileye.com", "time": "Thu Sep 10 10:54:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:54:40 2026" }, "message": "[mlir][emitc] Fix arith.{div,rem}ui index support (#221546)\n\nThese ops were failing to lower to emitc.{div,rem} when applied to index\noperands since the code was:\n- only checking for IntegerType, rejecting the !emitc.size_t into which\n IndexType is converted.\n- using the original operands instead of the converted ops, creating\n unrealized_conversion_cast ops." }, { "commit": "c52a3432d6a8187dd0f22ad1f8fde6774167dc89", "tree": "f7825846b84d8f6173274ccc935619d225d80861", "parents": [ "5bb6f55462541521488c0bbd59e028ee891f829b" ], "author": { "name": "Tomas Matheson", "email": "Tomas.Matheson@arm.com", "time": "Thu Sep 10 10:53:49 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:53:49 2026" }, "message": "[AsmPrinter] add optimisation remark for target-features (#222074)\n\nIn clang we have `--print-enabled-extensions` which will print the\nAArch64 extensions enabled for a given TU. However, sometimes it is\nuseful to be able to print out the actual subtarget features for each\nfunction, for debugging/testing purposes. Add an optimisation remark for\nthat." }, { "commit": "5bb6f55462541521488c0bbd59e028ee891f829b", "tree": "95185a2432bf605e58610ef244df11c37820c006", "parents": [ "f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92" ], "author": { "name": "Kseniya Tikhomirova", "email": "kseniya.tikhomirova@intel.com", "time": "Thu Sep 10 10:52:27 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:52:27 2026" }, "message": "[libsycl][NFC] Extend list of libsycl maintainers. (#222414)\n\nSigned-off-by: Tikhomirova, Kseniya \u003ckseniya.tikhomirova@intel.com\u003e" }, { "commit": "f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92", "tree": "2d408afd77fccd585c85eea112d3ef4c76de3d73", "parents": [ "b3e7900e74098de130402d0a3ea857e77d817540" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 10:48:44 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:48:44 2026" }, "message": "[IR] Mark whether param/ret attributes are ABI relevant (#222575)\n\nThis is specified using ABIAttr in TableGen and queried using\nisABIAttr().\n\nMake use of this in the Lint pass, instead of maintaining its own\n(outdated) list of ABI attributes.\n\nThis has been split out from #207173." }, { "commit": "b3e7900e74098de130402d0a3ea857e77d817540", "tree": "d6e618667fb48e34f74358d61c5e2a1cf6cc86a7", "parents": [ "bde886d4e2a244045390da84a8cb9238ad1d3ab7" ], "author": { "name": "Tianyi Chen", "email": "diannaaav@gmail.com", "time": "Thu Sep 10 10:29:56 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:29:56 2026" }, "message": "[llvm-readobj] Exclude Mach-O dylib IDs from needed libraries (#221618)\n\nFor Mach-O files, `--needed-libs` includes `LC_ID_DYLIB`, causing a\ndynamic\nlibrary to list its own install name as a dependency.\n\nExclude this command while retaining the actual dependency load\ncommands.\n\nFixes #39505.\n\nAssisted-by: OpenAI Codex (implementation, tests, and initial\ndescription)." }, { "commit": "bde886d4e2a244045390da84a8cb9238ad1d3ab7", "tree": "9448ba952b670574ab188e1338369a17986ddc80", "parents": [ "eb3aad0e4c85c8ce083648297950aa11c46b27e4" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 10:28:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:28:21 2026" }, "message": "AMDGPU: Start using subarch in attributor instead of subtarget (#212207)\n\nAvoid querying the subtarget for functions when the relevant\nproperties are known from the triple. The various subtarget\ngroup size functions should also be decoupled from the subtarget,\nbut those are trickier to untangle.\n\nCo-authored-by: Claude (Opus 4.8) \u003cnoreply@anthropic.com\u003e" }, { "commit": "eb3aad0e4c85c8ce083648297950aa11c46b27e4", "tree": "ee5876f4d730bf4dc791755a74938409f0b8cc1f", "parents": [ "c86292488b86080d994de4164342b8e0fdd43543" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 10:28:06 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:28:06 2026" }, "message": "[BrainF] Remove use of getSizeOf() (#222590)\n\ngetSizeOf() is incompatible with ptradd. Also entirely unnecessary\nhere." }, { "commit": "c86292488b86080d994de4164342b8e0fdd43543", "tree": "c3c728dc1fdaf8506e10e5f06def62bdb0276227", "parents": [ "0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a" ], "author": { "name": "Anutosh Bhat", "email": "andersonbhat491@gmail.com", "time": "Thu Sep 10 10:27:02 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:27:02 2026" }, "message": "[llc] Add a reusable LLVMLlcDriver library (#221896)\n\nPlease read :\n[RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)\nand [RFC\nsection](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-proposed-first-change-llvmllcdriver-8)\n\nThis splits `llc` into a small standalone executable and a reusable\n`LLVMLlcDriver` library.\n\nThe change follows the structure introduced for `opt` by @wsmoses in\n[#79205](https://github.com/llvm/llvm-project/pull/79205): the\ncommand-line implementation moves into a driver library, while `llc.cpp`\nremains the standalone entry point and continues to own `InitLLVM`.\n\nThe immediate motivation is embedding `llc` in long-lived applications\nsuch as [WasmBolt](https://github.com/anutosh491/WasmBolt) (try\n[here](https://anutosh21.github.io/WasmBolt/))\n\nCurrently, embedders must compile and modify a copy of `llc.cpp` because\nthe implementation and `main()` live in the same translation unit. This\nsplit provides a reusable entry point without changing the behavior of\nthe\nstandalone `llc` executable." }, { "commit": "0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a", "tree": "17b08dafce9d5a3d286ead1b1dd510681ecfe728", "parents": [ "c7e6e9881a42780852d535bfc7d59f63e76642e4" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Thu Sep 10 10:13:46 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:13:46 2026" }, "message": "[VPlan] Inline a using declaration in single use-site (NFC) (#222259)" }, { "commit": "c7e6e9881a42780852d535bfc7d59f63e76642e4", "tree": "e12508bcd44fd159bc81cad568b57de084b33a52", "parents": [ "8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Thu Sep 10 10:13:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:13:21 2026" }, "message": "[VPlan] Simplify PlainCFG VPI construction (NFC) (#216435)" }, { "commit": "8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52", "tree": "f723a19bfdeea8f9b24aa732484fb3efde81615f", "parents": [ "3a25949882c3ee496b523bcc816974c6ddfa9850" ], "author": { "name": "Harald van Dijk", "email": "hdijk@accesssoftek.com", "time": "Thu Sep 10 10:10:28 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:10:28 2026" }, "message": "[llvm-strings] Style updates primarily for --radix (#222454)\n\n* Silence clang-tidy by moving radix into anonymous namespace\n* Adjust type and variable naming to match LLVM style\n* Adjust --radix command line error message to match llvm-objdump\n* Use llvm::StringSwitch to map option values to enumerators\n* Remove undocumented and untested --radix\u003d\"\" option which was an\nimplementation detail to handle --radix not being specified" }, { "commit": "3a25949882c3ee496b523bcc816974c6ddfa9850", "tree": "ad1a87d05a8fc61e6ee3af8c0b39b085ed0de4b0", "parents": [ "278e125048fd83b66b6d053c40e31d47b4551884" ], "author": { "name": "Anutosh Bhat", "email": "andersonbhat491@gmail.com", "time": "Thu Sep 10 10:05:34 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:05:34 2026" }, "message": "[mlir-translate] Move InitLLVM ownership to the standalone tool (#222570)\n\nPlease Read: [RFC: Embeddable LLVM tool drivers for long-lived\nhosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)\nand [Why `InitLLVM` ownership matters section in the\nRFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)\n\n`mlirTranslateMain` currently constructs `InitLLVM` internally. This is\nfine when `mlir-translate` runs once as a standalone executable, but it\ndoes not work for an in-process setting where the host remains alive and\ninvokes multiple LLVM tools. When `mlirTranslateMain` returns, the\n`InitLLVM` destructor calls `llvm_shutdown()` and destroys\nprocess-global `ManagedStatic` state that may still be needed by the\nhost and subsequent tool invocations.\n\n[WasmBolt](https://github.com/anutosh491/WasmBolt) (try\n[here](https://anutosh21.github.io/WasmBolt/)) is a concrete example of\nsuch a host. It runs Clang, `mlir-opt`, `opt`, `llc` and LLD inside one\nbrowser-hosted LLVM process, allowing users to inspect and transform\ncode without a remote compilation server.\n\nAs described in the [MLIR section of the\nRFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13),\nthe real `mlir-opt` driver already works in this environment.\n`MlirOptMain` does not own `InitLLVM`, so the surrounding host can\ncontrol the process lifetime. `mlirTranslateMain` does not currently\nprovide the same ownership boundary, which prevents us from integrating\nit in the same clean way.\n\nThe working `mlir-opt` pipeline can be seen here:\nhttps://www.youtube.com/watch?v\u003dyga2lWelne4\n\nThis patch makes the two MLIR driver interfaces consistent by moving\n`InitLLVM` from the reusable `mlirTranslateMain` entry point into the\nstandalone `mlir-translate` executable:\n\n```text\nstandalone:\n main -\u003e InitLLVM -\u003e mlirTranslateMain -\u003e process exit\n\nembedded:\n host-owned InitLLVM / LLVMToolSession -\u003e mlirTranslateMain\n```\n\nStandalone behaviour remains unchanged, while MLIRTranslateLib can now\nborrow the process lifetime owned by a long-lived host." }, { "commit": "278e125048fd83b66b6d053c40e31d47b4551884", "tree": "dea26bf962b304d922dfa8183c30d1ac4e88dae2", "parents": [ "9679fbfea993cb2e815fe0fa5eefde310f917349" ], "author": { "name": "Paul Walker", "email": "paul.walker@arm.com", "time": "Thu Sep 10 10:02:07 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 10:02:07 2026" }, "message": "[LLVM][CodeGen][AArch64] Fix incorrect chain usage when lowering ISD::STRICT_FP_EXTEND. (#222287)\n\nThe chain was being passed as the last operand when it should be the\nfirst." }, { "commit": "9679fbfea993cb2e815fe0fa5eefde310f917349", "tree": "ad2e9f8a00993ba2e17bb8f2d70e9145fcfdd934", "parents": [ "c9e07d91eb9338f1922adbc120f68cf071bd9c2c" ], "author": { "name": "Paul Walker", "email": "paul.walker@arm.com", "time": "Thu Sep 10 09:57:26 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 09:57:26 2026" }, "message": "[LLVM][CodeGen][SME] Don\u0027t use non-streaming zeroing instruction when in streaming mode. (#222353)\n\nWhen selecting scalable vector bf16-f32 converts we emit zip(0,vec).\nUnfortunately, the typical zero-latency zeroing instruction is not\navailable when in streaming mode." }, { "commit": "c9e07d91eb9338f1922adbc120f68cf071bd9c2c", "tree": "1d8b27b1e67d4137c392e524c2c43c5299b272d7", "parents": [ "2cd17898705456c546359b0683cbc6fb252698d9" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Sep 10 09:51:33 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 09:51:33 2026" }, "message": "[MLIR][NVVM] Shard generated operation definitions (NFC) (#221812)\n\nGenerate the NVVM operation definitions in eight shards, use the\ngenerated registration hook, and expose only the four parser and range\nhelpers referenced by generated code.\n\nAssisted-by: Codex" }, { "commit": "2cd17898705456c546359b0683cbc6fb252698d9", "tree": "c1ab52ed77479d963b77d44f0515982733971406", "parents": [ "6b2ef39be51f46e2f359f6965588577913765af4" ], "author": { "name": "Lang Hames", "email": "lhames@gmail.com", "time": "Thu Sep 10 09:38:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 09:38:57 2026" }, "message": "[orc-rt] Express CI symbols as C-level names (#222564)\n\nController-interface wrapper functions are now declared extern \"C\",\nexported, and registered under their C-level names, so that they resolve\nidentically whether looked up through the bootstrap symbol map or via\ndlsym.\n\nIn addition to removing the inconsistency between the symbol-table and\ndlsym names, making CI functions public declarations allows unit tests\nto call CI wrappers directly (rather than having to resigster them and\nthen look them up in a symbol table).\n\nORC_RT_SPS_WRAPPER and ORC_RT_SPS_ALLOC_ACTION each split into _DECL and\n_IMPL forms sharing a _SIG macro, giving the wrappers extern \"C\" linkage\nand an ORC_RT_C_EXPORT annotation.\n\nSimpleSymbolTable::addUnique now takes SymbolNameSpec names and mangles\nthem, with a second overload for merging one table into another." }, { "commit": "6b2ef39be51f46e2f359f6965588577913765af4", "tree": "f1443db7cf34b1e1f9a92b156a98a829e2f81756", "parents": [ "246beeb1eef7344750419fd1f584019f7c62b750" ], "author": { "name": "Cullen Rhodes", "email": "cullen.rhodes@arm.com", "time": "Thu Sep 10 09:31:22 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 09:31:22 2026" }, "message": "[GlobalISel] Reserve IRTranslator value map and virtual register storage (NFC) (#222311)\n\nReserve storage based on the number of IR arguments and instructions to\navoid unnecessary container growth.\n\nImproves CTMark geomean -0.08% on aarch64-O0-g, including 0.18% on\nsqlite.\n\nhttps://llvm-compile-time-tracker.com/compare.php?from\u003dcec101b15dd27fb1c51b6c87cb6e9d78517d2b09\u0026to\u003d996caa798ca6e27dfc657296db4b8ae6519701b0\u0026stat\u003dinstructions:u\n\nAssisted-by: codex" }, { "commit": "246beeb1eef7344750419fd1f584019f7c62b750", "tree": "50a665175fc09035a93fb886f302b6a7f7c5ad8c", "parents": [ "35a6d33ca2f330c6a45588e5bd907f3729bc6011" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Thu Sep 10 08:57:30 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:57:30 2026" }, "message": "[BuildLibCalls] Use emitLibCall() in more places (NFCI) (#222557)" }, { "commit": "35a6d33ca2f330c6a45588e5bd907f3729bc6011", "tree": "22d921cc5e6fc75d6d69b5382928c7775fa141b6", "parents": [ "182f0ea1f8228c893093dabe824f9ad3eea81a60" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 08:45:03 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:45:03 2026" }, "message": "AMDGPU: Remove deprecated getArchAttr and ArchFeatures TableGen (#222462)\n\nEverything should now use getFeatureBitset*\n\nCo-authored-by: Claude (Opus 4.8) \u003cnoreply@anthropic.com\u003e" }, { "commit": "182f0ea1f8228c893093dabe824f9ad3eea81a60", "tree": "b8d33ceb3e8ef26a569857d4d401a2b494c60b47", "parents": [ "404ceba2628b7f925ce650b63e1ea90440927481" ], "author": { "name": "Dan Blackwell", "email": "dan_blackwell@apple.com", "time": "Thu Sep 10 08:44:19 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:44:19 2026" }, "message": "[libFuzzer] Modify stop-file.test to support remote devices (#222012)\n\nCurrently this test fails when running on remote devices because the\n\u0027rm\u0027 command only removes the file from the host, and the second part of\nthe test expects the file to have been removed. This patch changes the later \nrun command to point to a non-existent file in order to work around this.\n\nrdar://186683123" }, { "commit": "404ceba2628b7f925ce650b63e1ea90440927481", "tree": "14c47e9e48ebc8b42f147a2c77418ee7f1f8e75d", "parents": [ "80164074c01fead28cbf013861eeab23d277bbaf" ], "author": { "name": "CarolineConcatto", "email": "caroline.concatto@arm.com", "time": "Thu Sep 10 08:40:04 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:40:04 2026" }, "message": "[AArch64][NEON] Fold insert(zero, extract(X, 0), 0) -\u003e X when X is known to zero lanes 1-N (#213940)\n\nAdd patterns for NEON across-lane reductions whose scalar result\nis inserted into lane zero of a zero vector.\n\nThis is valid because these instructions place their result in lane zero\nand\nclear the remaining lanes.\n\nLimit this change to matching input and result vector types. Mixed\nvector\nsizes and scalar conversions are not part of this PR.\n\nHandle llvm.vector.reduce.add.v2i64 separately because it lowers to\nADDP.\nNEON has no equivalent instruction for v2i64 signed or unsigned min/max\nreductions, so they cannot use this fold. Double-precision\nfloating-point\nreductions are already handled by pairwise instruction patterns." }, { "commit": "80164074c01fead28cbf013861eeab23d277bbaf", "tree": "753e49f98735d9da8f347690aff563a202a3c69d", "parents": [ "70f5696eaf0280812fb4e3888875538634d806f1" ], "author": { "name": "Renato Golin", "email": "rengolin@systemcall.eu", "time": "Thu Sep 10 08:26:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:26:53 2026" }, "message": "[MLIR][Linalg] Remove Linalg named ops (#220916)\n\nRemoves the named ops from the Linalg dialect.\n\nI have also updated the ElementwiseOp builder to simplify the default\ncase: kind + no affine map.\n\nDepends on both unary and binary removal branches. #220905 #220912\n\nThis PR also has the final cleanup, which turned out to be simple\nenough.\n\nRef:\n\nhttps://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531\n\nAssisted by: Claude Opus" }, { "commit": "70f5696eaf0280812fb4e3888875538634d806f1", "tree": "3819d0cb9b48076623e215d7c59cac3b0fa45d85", "parents": [ "3b99e79991bede38fb18e0169df3009ce30e0c1d" ], "author": { "name": "Renato Golin", "email": "rengolin@systemcall.eu", "time": "Thu Sep 10 08:26:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:26:53 2026" }, "message": "[MLIR][Linalg] Remove binary named ops (#220912)\n\nRemove ops, change tests to elementwise to continue working as is.\n\nDepends on the unary removal branch. #220905 \n\nRef:\n\nhttps://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531\n\nAssisted by: Claude Opus" }, { "commit": "3b99e79991bede38fb18e0169df3009ce30e0c1d", "tree": "da39a2be65322aa66c43252cb37b858f39d4bec3", "parents": [ "51daef2bd9d2aadffa2fb0b9abd981b84e616e31" ], "author": { "name": "Renato Golin", "email": "rengolin@systemcall.eu", "time": "Thu Sep 10 08:26:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:26:52 2026" }, "message": "[MLIR][Linalg] Remove unary named ops (#220905)\n\nRemove ops, change tests to elementwise to continue working as is.\n\nRef:\n\nhttps://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531\n\nAssisted by: Claude Opus" }, { "commit": "51daef2bd9d2aadffa2fb0b9abd981b84e616e31", "tree": "14932c5d2cac1e757c1bcca46e4a1c2aaed2b7e4", "parents": [ "0573ec95004aad9970129dce97d3d3ef34aba978" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 08:22:33 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:22:33 2026" }, "message": "X86: Mark EFLAGS dead on MOV32r0 emitted outside SelectionDAG (#222464)\n\nCurrently these get set by LiveVariables after the fact, but\nideally we would not rely on that since it\u0027s long overdue for\ndeletion.\n\nCo-authored-by: Claude (Opus 4.8) \u003cnoreply@anthropic.com\u003e" }, { "commit": "0573ec95004aad9970129dce97d3d3ef34aba978", "tree": "83f6d3eadf0b39741f1f0d25ba2dfd7c7644ed4a", "parents": [ "bab513bedcf5c7582a24c97976042af4dba19c01" ], "author": { "name": "Mehdi Amini", "email": "joker.eph@gmail.com", "time": "Thu Sep 10 08:22:30 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:22:30 2026" }, "message": "[mlir][lsp] Handle unrepresentable file locations (#220913)" }, { "commit": "bab513bedcf5c7582a24c97976042af4dba19c01", "tree": "d1c40c36b865323d7298e699222f13d173626937", "parents": [ "672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d" ], "author": { "name": "Lukas Sommer", "email": "lukas.sommer@amd.com", "time": "Thu Sep 10 08:20:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:20:45 2026" }, "message": "[AMDGPU] Use new CSR cost calculation (#219220)\n\nSo far, AMDGPU backend relied on the legacy calculation for the cost of\nthe first use of a callee-save register. This legacy path scales the\nentry block frequency by a fixed value, making a comparison with\nalternatives, e.g., rematerialization, difficult due to different\nscales. One example for that is the work in\nhttps://github.com/llvm/llvm-project/pull/206756, where comparison of\nrematerialization cost and first use of a CSR is hard to compare due to\nthe different scales.\n\nChange to instead use the new calculation path with different target\nhooks for better comparability.\n\nAs the new scale is different, the cost was changed. The new cost value\naccounts for various factors impacting CSR cost.\n\nThis change (with different cost value) was originally part of\nhttps://github.com/llvm/llvm-project/pull/202007. Another part of that\nPR was already extracted into\nhttps://github.com/llvm/llvm-project/pull/214857.\n\n---------\n\nSigned-off-by: Lukas Sommer \u003clukas.sommer@amd.com\u003e" }, { "commit": "672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d", "tree": "d4c78d08128c3b5d265ad7b2da3e733f47f5b518", "parents": [ "ab7245d75cc97db490d73037b5f021a561381d0d" ], "author": { "name": "Michael G. Kazakov", "email": "mike.kazakov@gmail.com", "time": "Thu Sep 10 08:03:34 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 08:03:34 2026" }, "message": "[libc++][pstl] Implementation of parallel std::minmax_element() based on parallel reduce (#221572)\n\nThis PR adds an implementation of parallel `std::minmax_element()` based\non parallel reduce.\n\nThe implementation formulates `minmax_element` as a reduction of\niterators over the input range.\nThe iterators are first transformed into a min-max iterator pair.\nThe reduction is provided in two forms: 2-element reduction that makes\nan iterator pair pointing to a smaller and a greater value, and a\nrange-based reduction with init value.\nThe latter delegates the heavy-lifting to the serial implementation of\n`std::minmax_element()`.\n\nPart of #99938." }, { "commit": "ab7245d75cc97db490d73037b5f021a561381d0d", "tree": "26ef1c0e4a12260b2db88aaef9f327bbe1cf2660", "parents": [ "96295a1412f9afbee9d4a3c2701e83f5a529a9cc" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Thu Sep 10 07:56:16 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:56:16 2026" }, "message": "libclc: Update fmod implementations (#222369)\n\nThis was originally ported from rocm device libs in\n93af966747b59d37c57312a0c0242151076c072b. Merge in more\nrecent changes. This should also approximately match the default\nexpansion in ExpandIRInsts\n\nCo-authored-by: Claude \u003cnoreply@anthropic.com\u003e" }, { "commit": "96295a1412f9afbee9d4a3c2701e83f5a529a9cc", "tree": "be29dc639d0e37abd7c2942045cbec70fde05250", "parents": [ "a9f7095c26175f363282ed2cdfb52acada3c2d93" ], "author": { "name": "Corentin Jabot", "email": "corentinjabot@gmail.com", "time": "Thu Sep 10 07:36:09 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:36:09 2026" }, "message": "[Clang] Fix a crash when forming a type from an indexed TTP. (#222326)\n\nUnreported 24 issue so no release note." }, { "commit": "a9f7095c26175f363282ed2cdfb52acada3c2d93", "tree": "3c940adc7ab414c138c03a2c3becbeec18fdeaf3", "parents": [ "4e22a6ef80ac0ac234acca473706cc5cce17d6c4" ], "author": { "name": "Timm Baeder", "email": "tbaeder@redhat.com", "time": "Thu Sep 10 07:27:31 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:27:31 2026" }, "message": "[clang][bytecode] Use opaque pointers for decl-based dummy pointers (#220917)\n\nThis uses the recently introduced opaque pointers for what we used to\nuse dummy pointers for, if the base of the pointer is a declaration.\n\nThis of course means we see opaque pointers in a lot more places.\nHowever, we don\u0027t need to actually allocate anything for their data\nanymore, resulting in a lot fewer allocations for such pointers." }, { "commit": "4e22a6ef80ac0ac234acca473706cc5cce17d6c4", "tree": "9a30cb70b245895b44cf087d5ff66ba72a4d859e", "parents": [ "4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3" ], "author": { "name": "Oren Azad", "email": "orenazad@berkeley.edu", "time": "Thu Sep 10 07:25:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:25:45 2026" }, "message": "[llvm-rc] Add /showIncludes dependency reporting (#217102)\n\nAdd `/showIncludes` support to `llvm-rc` so build systems can discover\nthe files a resource compile depends on. This enables Ninja and other\nbuild systems to track and correctly recompile the `.rc` file when\ninputs change.\n\nTwo kinds of dependencies are reported:\n\n- Preprocessor header dependencies, by forwarding `--show-includes` to\nthe clang preprocessor.\n- Resource files, (bitmaps, icons, manifests, etc) that are used in the\nresource file.\n\nThe output format matches the `/showIncludes` format that cl.exe and\nclang-cl.exe use, and that Ninja can consume natively via `deps\u003dmsvc`.\n\nAssisted-by: Anthropic Claude Code (Opus 4.8)\nAssisted-by: OpenAI Codex (GPT 5.6 Sol)" }, { "commit": "4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3", "tree": "ce9b6fb316497b2580df1f32ac9ab01e56a6cff7", "parents": [ "bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed" ], "author": { "name": "David Green", "email": "david.green@arm.com", "time": "Thu Sep 10 07:16:03 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:16:03 2026" }, "message": "[AArch64][GlobalISel] Use integer types for widening shift icmp (#222257)" }, { "commit": "bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed", "tree": "0c8e55653fa9983c14fd80c571e4d9bbe93856ed", "parents": [ "a9e26aca790bb0a45f90598223597a9ce2b2b763" ], "author": { "name": "Ryan VanderMeulen", "email": "ryanvm@gmail.com", "time": "Thu Sep 10 07:14:23 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:14:23 2026" }, "message": "[Windows] Export Registry\u003cT\u003e members and accessors for plugins again (#221296)\n\nSince #185141 reworked `llvm::Registry`, the registered-node list lives\nbehind the explicitly specialized\n`llvm::detail::getRegistryLinkListInstance\u003cR\u003e()` accessor defined by\n`LLVM_DEFINE_REGISTRY`, and the `Head`/`Tail` static data members that\nused to be referenced across objects are gone (#163391 had special-cased\nthose).\n\n`extract_symbols.py` handles neither. The accessor is a `??$` function\ntemplate specialization, which the script drops on the assumption that\nit can be instantiated in the importing translation unit; here it\ncannot, it is defined once by `LLVM_DEFINE_REGISTRY`. And `Registry\u003cT\u003e`\nmembers are only exported when some object references the `Registry`\ntemplate, which nothing does anymore because every use goes through the\naccessor. On a static clang.exe built with\n`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`, the export table went from 11\n`Registry\u003cclang::PluginASTAction\u003e` symbols on 22.1.8 to zero on 23.1.0,\nand linking a plugin fails:\n\n```\nlld-link: error: undefined symbol: __declspec(dllimport) public: static void __cdecl llvm::Registry\u003cclass clang::PluginASTAction\u003e::add_node(class llvm::Registry\u003cclass clang::PluginASTAction\u003e::node *)\n\u003e\u003e\u003e referenced by host_Registration.obj:(_GLOBAL__sub_I_Registration.cpp)\n```\n\nKeep the accessor specializations, and treat a reference to an accessor\nas a reference to the `Registry` template so its explicitly instantiated\nmembers are exported as they were before. Verified on the 23.1.0 static\nlibraries: `Registry\u003cPluginASTAction\u003e::add_node`, the node/iterator\nmembers and the accessor come back for every registry (PluginASTAction,\nPragmaHandler, GCStrategy, GCMetadataPrinter, ...), 141 symbols in total\nin the Itanium run over the clang libraries. The `Head`/`Tail` rule from\n#163391 no longer matches anything and is dropped.\n\nRelated: #163367 / #163391 (the previous Registry export fix), #87865.\n\n---\n**AI tool use disclosure** (per the [LLVM AI Tool Use\nPolicy](https://llvm.org/docs/AIToolPolicy.html)): this change was\ndeveloped with Claude Code assisting in the analysis and drafting. The\nroot cause was established against real 23.1.0 binaries and libraries,\nand the fix was verified by running extract_symbols.py over the 23.1.0\nclang static libraries (the Registry members and accessors come back)\nand against MSVC-mangled test objects; Firefox\u0027s Windows clang-plugin\nand mozsearch builds link and run against a clang.exe built with it.\n`llvm/test/tools/extract_symbols/` adds lit coverage for both manglings.\nThe author reviewed the change and is accountable for and able to answer\nquestions about it. Commits carry an `Assisted-by:` trailer." }, { "commit": "a9e26aca790bb0a45f90598223597a9ce2b2b763", "tree": "3947a8c0622ca22ca47bb6ca1c8ba0c00116923f", "parents": [ "be215a25f00139d68517589d78a79c3aa7a7eb26" ], "author": { "name": "Benjamin Maxwell", "email": "benjamin.maxwell@arm.com", "time": "Thu Sep 10 07:12:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:12:40 2026" }, "message": "[LV] Avoid `std::optional\u003cVPValue *\u003e` (NFC) (#222352)\n\n`VPValue *` is already nullable, the `std::optional` is not needed." }, { "commit": "be215a25f00139d68517589d78a79c3aa7a7eb26", "tree": "aeda5558ac58a2dbd0a4fe58d5802b86cd30e437", "parents": [ "a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7" ], "author": { "name": "Ryan VanderMeulen", "email": "ryanvm@gmail.com", "time": "Thu Sep 10 07:11:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:11:40 2026" }, "message": "[Windows] Don\u0027t export clang::interp symbols for plugins (#221295)\n\nWith `LLVM_EXPORT_SYMBOLS_FOR_PLUGINS\u003dON`, `clang.exe` built from the\n23.x release branch exports 66679 symbols on x86_64 Windows, over the\n65535 limit of the PE export table, so it no longer links:\n\n```\nlld-link: error: too many exported symbols (got 66679, max 65535)\n```\n\nFor comparison, the same configuration on 22.1.8 exports 65465 symbols,\nso the headroom was already almost gone.\n\n`clang::interp`, the constant expression bytecode interpreter, accounts\nfor roughly 4500 of the exported symbols (counted with `llvm-readobj\n--coff-exports` on a linked aarch64 23.1.0 `clang.exe`). Its headers\nlive in `clang/lib/AST/ByteCode` and are not installed; the only mention\nin a public header is the forward declaration of `interp::Context` in\n`ASTContext.h`. A plugin cannot call into it, so there is no reason to\nkeep exporting it. Filtering it out follows the existing\n`dump`/`dumpColor`/`printPretty` exclusions in\n`should_keep_microsoft_symbol`.\n\nRelated: #87865 (open; earlier rounds #60109, #56109). This does not get\nthe MSVC-with-examples configuration from that issue under the limit by\nitself, but it removes the largest block of symbols that can never be\nused by a plugin, and is what gets the Firefox clang 23 toolchain\n(x86_64-pc-windows-msvc, X86;ARM;AArch64;WebAssembly,\nclang+lld+clang-tools-extra) from 66679 to roughly 62100 exports.\n\n---\n**AI tool use disclosure** (per the [LLVM AI Tool Use\nPolicy](https://llvm.org/docs/AIToolPolicy.html)): this change was\ndeveloped with Claude Code assisting in the analysis and drafting. The\nroot cause was established against real 23.1.0 binaries and libraries,\nthe patch was reviewed and tested by the author in Firefox\u0027s CI, and the\nauthor is accountable for and able to answer questions about it. Commits\ncarry an `Assisted-by:` trailer." }, { "commit": "a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7", "tree": "3e09b9c3c765661c13e2e3b7a254fdc334a00ca3", "parents": [ "b89710b49c4a2da1f98ba4b407dcfecaaa90246a" ], "author": { "name": "PushkarSingh", "email": "149073046+iitianpushkar@users.noreply.github.com", "time": "Thu Sep 10 07:04:35 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 07:04:35 2026" }, "message": "[Lifetime Safety] Name operator calls in alias-chain diagnostics (#221803)\n\nThis updates Lifetime Safety alias-chain diagnostics to identify\noverloaded operator and conversion calls instead of describing them\ngenerically as an `expression`.\n\nPreviously, these calls were reported as `expression aliases the storage\nof ...`, which could make it unclear which operation introduced the\nalias. The diagnostic now reports the callee using the existing\ndiagnostic name printer, producing descriptions such as:\n\n- `result of call to \u0027operator-\u003e\u0027`\n- `result of call to \u0027operator()\u0027`\n- `result of call to \u0027operator basic_string_view\u0027`\n\nTemplate arguments are preserved for operator function-template\nspecializations. For example:\n\n- `result of call to \u0027operator+\u003cconst int\u003e\u0027`\n- `result of call to \u0027operator-\u003c__gnu_cxx::basic_iterator\u003cconst int\u003e\u003e\u0027`\n\nThis makes each aliasing step explicit and identifies the particular\ncall responsible for propagating the alias.\n\nReferences to\n[#220248#discussion_r3905817437](https://github.com/llvm/llvm-project/pull/220248#discussion_r3905817437)" }, { "commit": "b89710b49c4a2da1f98ba4b407dcfecaaa90246a", "tree": "8064d37daa4eaeb2e00f31884af4268b8209a4b7", "parents": [ "9e68cbda7816edded93e2c3a4dd03af5d4700026" ], "author": { "name": "David Green", "email": "david.green@arm.com", "time": "Thu Sep 10 06:51:20 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 06:51:20 2026" }, "message": "[AArch64][GlobalISel] Lower vector overflow intrinsics (#222091)\n\nAs we have no native support for vector version of these intrinsics they\nshould be lowered." }, { "commit": "9e68cbda7816edded93e2c3a4dd03af5d4700026", "tree": "f7794d40e0c8b1bae92829865845612a6d1dc3d5", "parents": [ "6fbfc9261c8f453e346773200a13458a170a9a8c" ], "author": { "name": "Pradeep Kumar", "email": "pradeepku@nvidia.com", "time": "Thu Sep 10 06:03:31 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 06:03:31 2026" }, "message": "[LLVM][NVPTX][MLIR] Support layouts in mbarrier.init and add mbarrier.check_layout (#217252)\n\nThis commit adds LLVM NVPTX and MLIR NVVM support for the mbarrier layout extensions:\n\n- llvm.nvvm.mbarrier.init with trailing immarg `layout` operand, and nvvm.mbarrier.init a matching `layout` attribute (default to 0) Layout 0 is the default in-memory layout and is emitted as a plain mbarrier.init; layout 1 is emitted as mbarrier.init.layout::v1.\n- llvm.nvvm.mbarrier.check_layout / nvvm.mbarrier.check_layout, lowering to mbarrier.check_layout.layout::v{0,1}.\n\nOnly the layout::v1 form of mbarrier.init and mbarrier.check_layout require PTX ISA 9.3 and sm_90\n\nllvm.nvvm.mbarrier.init{.shared } are also merged into a pointer-overloaded llvm.nvvm.mbarrier.init with calls to either older forms auto-upgraded\n\nPlease refer [PTX ISA](https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html)\nfor more details\n\nAssisted by: Claude Code (Opus 5)" }, { "commit": "6fbfc9261c8f453e346773200a13458a170a9a8c", "tree": "0735adfe276002d0f0a11d9f1ee4038dc087d5b6", "parents": [ "3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8" ], "author": { "name": "Peiqi Li", "email": "voyager.lpq@gmail.com", "time": "Thu Sep 10 05:59:58 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 05:59:58 2026" }, "message": "[clangd] Enable query-based custom checks (#216336)\n\nEnable query-based custom checks in clangd behind a new `Diagnostics.ClangTidy.ExperimentalCustomChecks` configuration option.\n\nCustom checks are registered from the per-file clang-tidy options and remain subject to clangd\u0027s `FastCheckFilter` policy.\n\nFixes #206696\n\nAssisted by GPT-5.6" }, { "commit": "3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8", "tree": "61f0432504d076c0955ad820f7eff74d04a66fb6", "parents": [ "17caaa3bdbb229aa63c56864c1452100cfe36f39" ], "author": { "name": "Jinjie Huang", "email": "huangjinjie@bytedance.com", "time": "Thu Sep 10 05:57:35 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 05:57:35 2026" }, "message": "[BOLT][ICP] Use PC-relative instructions for x86 PIC binaries in ICP (#216587)\n\nCurrently, BOLT x86 ICP optimization inserts an immediate-to-register\ncomparison instruction, which forces the use of 32-bit signed (32S)\nrelocations due to ABI limitations. This behavior does not align well\nwith the conventions of PIC/PIE binaries and **makes it highly prone to\nJITLink relocation overflow errors when dealing with large binaries.**\n\nTherefore, this patch introduces an additional lea instruction for the\nx86 architecture to leverage PC-relative (32PC) addressing. This change\nis intended to apply by default to PIC binaries, or when specific\noptions are provided." } ], "next": "17caaa3bdbb229aa63c56864c1452100cfe36f39" }