HSD #14014656595: dt-bindings: net: add bindings for Intel FPGA E-Tile Ethernet driver
This patch adds a bindings description for Intel FPGA E-Tile Ethernet
driver. The bindings support mSGDMA Prefetcher soft IP and PTP 1588.
Signed-off-by: Tham, Mun Yew <[email protected]>
diff --git a/Documentation/devicetree/bindings/net/intel,etile.yaml b/Documentation/devicetree/bindings/net/intel,etile.yaml
new file mode 100644
index 0000000..c22c1a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/intel,etile.yaml
@@ -0,0 +1,158 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/intel,etile.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel FPGA E-Tile Ethernet MAC Controller
+
+maintainers:
+ - Tham, Mun Yew <[email protected]>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - altr,etile-msgdma-2.0
+ required:
+ - compatible
+
+allOf:
+ - $ref: "intel,etile.yaml#"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - altr,etile-msgdma-2.0
+
+ then:
+ properties:
+ regs:
+ items:
+ - description:
+ Address and length of the register set for the device.
+ It contains the information of registers in the same
+ order as described by reg-names.
+
+ reg-names:
+ items:
+ - description: Should contain the register names.
+
+ interrupts:
+ items:
+ - description:
+ Should contain the E-Tile interrupts and it's mode.
+
+ interrupts-names:
+ items:
+ - description: DMA Rx dispatcher interrupt.
+ - description: DMA Tx dispatcher interrupt.
+ - const: rx_irq
+ - const: tx_irq
+
+ clocks:
+ items:
+ - description: The clock which drives the timing adjustment logic
+
+ clock-names:
+ items:
+ - const: tod_clk
+
+ rx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC receive FIFO buffer depth in bytes.
+
+ tx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC transmit FIFO buffer depth in bytes.
+
+ rx-fifo-almost-full:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Value that indicates RX FIFO buffer is getting full.
+
+ rx-fifo-almost-empty:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Value that indicates RX FIFO buffer is getting empty.
+
+ qsfp:
+ description: See sff,sfp.txt in the same directory.
+
+ altr,tx-pma-delay-ns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC Tx PMA digital delay in nanoseconds.
+
+ altr,rx-pma-delay-ns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC RX PMA digital delay in nanoseconds.
+
+ altr,tx-pma-delay-fns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC TX PMA digital delay in fractional nanoseconds.
+
+ altr,rx-pma-delay-fns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: MAC RX PMA digital delay in fractional nanoseconds.
+
+ altr,tx-external-phy-delay-ns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: External TX PHY delay in fractional nanoseconds.
+
+ altr,rx-external-phy-delay-ns:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: External RX PHY delay in fractional nanoseconds.
+
+examples:
+
+ etile_0_etile: ethernet@0x102001000 {
+ compatible = "altr,etile-msgdma-2.0";
+ reg-names = "rsfec", "eth_reconfig", "xcvr", "tod_ctrl",
+ "tx_pref", "tx_csr", "rx_pref", "rx_csr",
+ "rx_fifo";
+ reg = <0x00000001 0x02001000 0x00000800>,
+ <0x00000001 0x02080000 0x00004000>,
+ <0x00000001 0x02100000 0x00080000>,
+ <0x00000001 0x02000040 0x00000040>,
+ <0x00000001 0x02000800 0x00000020>,
+ <0x00000001 0x02000820 0x00000020>,
+ <0x00000001 0x02000900 0x00000020>,
+ <0x00000001 0x02000920 0x00000020>,
+ <0x00000001 0x02000940 0x00000020>;
+ //dma-coherent;
+ phy-mode = "25gbase-kr";
+ qsfp = <&qsfp_eth0>;
+ clocks = <&ptp_ctrl_10G_clk>;
+ clock-names = "tod_clk";
+ interrupt-parent = <&intc>;
+ interrupt-names = "tx_irq", "rx_irq";
+ interrupts = <0 24 4>,
+ <0 25 4>;
+ rx-fifo-depth = <0x4000>;
+ tx-fifo-depth = <0x1000>;
+ rx-fifo-almost-full = <0x2000>;
+ rx-fifo-almost-empty = <0x1000>;
+ //local-mac-address = [fa b1 0a 12 72 44];
+ altr,tx-pma-delay-ns = <0xD>;
+ altr,rx-pma-delay-ns = <0x8>;
+ altr,tx-pma-delay-fns = <0x24D>;
+ altr,rx-pma-delay-fns = <0x3E97>;
+ altr,tx-external-phy-delay-ns = <0x0>;
+ altr,rx-external-phy-delay-ns = <0x0>;
+ fec-type = "kr-fec";
+ fec-cw-pos-rx = <3>;
+ altr,has-ptp;
+ status = "okay";
+ };
+
+ qsfp_eth0: qsfp-eth0 {
+ compatible = "sff,qsfp";
+ i2c-bus = <&i2c0>;
+ qsfpdd_initmode-gpio = <&qsfpdd_status_pio_1 0 GPIO_ACTIVE_HIGH>;
+ qsfpdd_modseln-gpio = <&qsfpdd_status_pio_1 2 GPIO_ACTIVE_LOW>;
+ qsfpdd_modprsn-gpio = <&qsfpdd_status_pio 0 GPIO_ACTIVE_LOW>;
+ qsfpdd_resetn-gpio = <&qsfpdd_status_pio_1 1 GPIO_ACTIVE_LOW>;
+ qsfpdd_intn-gpio = <&qsfpdd_status_pio 1 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <1000>;
+ status = "okay";
+ };
