)]}' { "log": [ { "commit": "4b448119a6dd33fffc2edd4a1c8a36759979eecc", "tree": "2623016e04f802bb2f59c7993a435444e26cc0db", "parents": [ "757574b390062bf929aae1a0c5ab6a843b2cd438" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Jun 02 23:57:00 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Jun 02 23:57:00 2026" }, "message": "i#7914 skipped memrefs: Record contiguous scatter/gather skipped memrefs (#7915)\n\nInitial step toward recording skipped memrefs: records AArch64\ncontiguous scatter/gather skipped memrefs. This is done by recording a\nnew raw record type holding the base address, with raw2trace filling in\nany skipped memrefs as the addresses are knowable from the base address\nand instruction encoding.\n\nEach skipped memref is stored as a new record type\nTRACE_MARKER_TYPE_SKIPPED_MEMREF in the final trace.Neither the memory\nreference size nor type (read or write) is included: it is assumed that\nthey can be inferred from the instruction fetch entry.\n\nA new skipped_memref_markers count is added to basic_counts and used to\nverify operation on the allasm scattergather test.\n\nSome examples:\n\n```\n 2404 274: W0.T825222 ifetch 4 byte(s) @ 0x0000000000400248 a5e1ec3c ld4d +0x40(%x1)[8byte] %p3/z -\u003e %z28.d %z29.d %z30.d %z31.d\n 2405 274: W0.T825222 read 8 byte(s) @ 0x000000000041044e by PC 0x0000000000400248\n 2406 274: W0.T825222 read 8 byte(s) @ 0x0000000000410456 by PC 0x0000000000400248\n 2407 274: W0.T825222 read 8 byte(s) @ 0x000000000041045e by PC 0x0000000000400248\n 2408 274: W0.T825222 read 8 byte(s) @ 0x0000000000410466 by PC 0x0000000000400248\n 2409 274: W0.T825222 \u003cmarker: skipped memref 0x41046e\n 2410 274: W0.T825222 \u003cmarker: skipped memref 0x410476\n 2411 274: W0.T825222 \u003cmarker: skipped memref 0x41047e\n 2412 274: W0.T825222 \u003cmarker: skipped memref 0x410486\n 2413 275: W0.T825222 ifetch 4 byte(s) @ 0x000000000040024c e401e03c st1b %z28.b %p0 -\u003e +0x10(%x1)[1byte]\n```\n\n```\n 2525 287: W0.T825222 ifetch 4 byte(s) @ 0x000000000040027c e531e83c st2w %z28.s %z29.s %p2 -\u003e +0x20(%x1)[4byte]\n 2526 287: W0.T825222 write 4 byte(s) @ 0x000000000041040e by PC 0x000000000040027c\n 2527 287: W0.T825222 write 4 byte(s) @ 0x0000000000410412 by PC 0x000000000040027c\n 2528 287: W0.T825222 \u003cmarker: skipped memref 0x410416\n 2529 287: W0.T825222 \u003cmarker: skipped memref 0x41041a\n 2530 287: W0.T825222 \u003cmarker: skipped memref 0x41041e\n 2531 287: W0.T825222 \u003cmarker: skipped memref 0x410422\n 2532 287: W0.T825222 \u003cmarker: skipped memref 0x410426\n 2533 287: W0.T825222 \u003cmarker: skipped memref 0x41042a\n 2534 288: W0.T825222 ifetch 4 byte(s) @ 0x0000000000400280 e5b1ec3c st2d %z28.d %z29.d %p3 -\u003e +0x20(%x1)[8byte]\n```\n\n\nIssue: #7914" }, { "commit": "757574b390062bf929aae1a0c5ab6a843b2cd438", "tree": "790b8940e7b00e1590c37f96a7bb612b7a6a32d8", "parents": [ "d091d45aad1cae039de571f760eb4587ec1d6704" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Fri May 29 23:08:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri May 29 23:08:52 2026" }, "message": "i#1734 tagged addrs: Add new OFFLINE_TYPE_PC_TOP_BIT (#7913)\n\nSwitches to using a new block PC type OFFLINE_TYPE_PC_TOP_BIT for raw\ndrmemtrace offline records in 64-bit mode. This allows distinguishing\naddresses from PC records under Intel Linear Address Masking with bits\n48..62 ignored.\n\nAdds a test case to the unit tests.\n\nIssue: #1734" }, { "commit": "d091d45aad1cae039de571f760eb4587ec1d6704", "tree": "f713a1a1e15175c435a5d9ad50ffacdd3c2de1f6", "parents": [ "84faf81bd22f94b8135a4a45575b757d32cff306" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu May 28 22:12:25 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 28 22:12:25 2026" }, "message": "i#1734 top bits: Auto-canonicalize addresses in scheduler (#7908)\n\nAdds a new on-by-default drmemtrace scheduler option\n\"canonicalize_addresses\" which auto-canonicalizes PC and address values\nin all record types. This avoids requiring all tools to handle top bits\nbeing set.\n\nAuto-canonicalization is only supported for memref_t usage: not for\ntrace_entry_t.\n\nAdds a new scheduler statistic SCHED_STAT_CANONICALIZED_ADDRESSES which\ncounts memref_t fields modified for canonicalization, which should be\nvery useful for seeing which traces have top bits set and how many.\n\nAdds a scheduler unit test.\n\nIssue: #1734" }, { "commit": "84faf81bd22f94b8135a4a45575b757d32cff306", "tree": "655b9f3d49b7b0043e705fb084c296c41a074b90", "parents": [ "f7ac196203980043c72a44192fb7116f6d563289" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu May 28 20:34:19 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 28 20:34:19 2026" }, "message": "i#7695: Fix 32-bit test failures on certain runners (#7911)\n\nFixes 32-bit test failures that occur in a group on certain Github\nrunners.\n\nFirst we have tests that use a checked-in trace file and are only run if\nzlib is available. The failing runners must have zlib, while all the\npassing runners do not have zlib:\n+ code_api|tool.drcacheoff.legacy\n+ code_api|tool.drcacheoff.func_view_noret\n+ code_api|tool.drcacheoff.altbindir\n\nThe checked-in file used for all 3 of these is a 64-bit file! So\nnaturally they fail, with file reader errors. So the solution is to\ndisable for 32-bit (32-bit is low priority; not worth adding an input\nfile).\n\nNext we have:\n+ code_api|tool.drcacheoff.burst_replaceall\n\nThis fails because it doesn\u0027t write out the encodings.bin file and we\nsee sysenter wrapper code: we end up with a modidx -1 and raw2trace\nfails because there\u0027s no encoding info (we got rid of vdso contents in\nmodules.log). We should just disable for 32-bit; again, not worth\nspending time improving the test just for 32-bit.\n\nFinally:\n+ code_api|tool.drcacheoff.burst_syscall_inject\n\nThis has an invariant failure on sysenter: that we can just relax.\n\nTested locally where these failures all reproduce.\n\nFixes #7695" }, { "commit": "f7ac196203980043c72a44192fb7116f6d563289", "tree": "825d27dbc9f6efe81185518371e8679c2536a43e", "parents": [ "a99abb3b983bd873d070d4932dcc86060df55967" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu May 28 16:24:19 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 28 16:24:19 2026" }, "message": "i#7909 unknown cache: Print out size when unknown (#7912)\n\nPrints out the cache size that is unknown so we can update the code to\nhandle this size once we get the failure to reproduce (6 attempts so far\nin PR #7910 have failed to hit a runner that reproduces).\n\nIssue: #7909" }, { "commit": "a99abb3b983bd873d070d4932dcc86060df55967", "tree": "e6e9f53a9eed161c864912172e38534a3c0fad9c", "parents": [ "0707781f435769ec375b9a865639cda46e42fb3f" ], "author": { "name": "Bin Wang", "email": "biwa@google.com", "time": "Thu May 28 00:02:11 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 28 00:02:11 2026" }, "message": "i#7902: Add support for Intel FRED instructions (#7903)\n\nAdd support for Intel FRED instructions (`erets`, `eretu`, `lkgs`)\n\nFixes #7902" }, { "commit": "0707781f435769ec375b9a865639cda46e42fb3f", "tree": "4cb650bc31b1f88fab0ee5ed7321d130475830d8", "parents": [ "db02925c4841efcba96f8eb1b8c3f4255ee63650" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed May 27 15:23:36 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed May 27 15:23:36 2026" }, "message": "i#1734 top bits: Make missing memrefs fatal errors (#7901)\n\nTurns missing load/store records in raw2trace into fatal errors, for\nearlier and more useful error reporting. This can only be done in basic\nblocks which do not contain any predicated/conditional loads/stores nor\nany expanded sequences like rep-string or scatter/gather.\n\nAdds memref counting and whether we expect to see all memrefs to the\nexisting elision analysis. Stores the data in the raw2trace block\nsummary and uses it during operand handling.\n\nAdds unit tests for both directions of the error.\n\nFixes unit tests that currently violate the new error.\n\nFixes some minor bugs that are not worth separating out as they do not\nhave significant implications without the other changes here:\n+ tracer.cpp fails to set op_disable_optimizations for\nop_L0_filter_until_instrs\n+ raw2trace was checking the old _FILTERED instead of _{I,D}FILTERED\n+ raw2trace wasn\u0027t setting disable_optimizations_ in instru_offline.\nThis fix is a little more involved, accomplished by moving the\ninstru_offline field to the per-thread data structure so it can be set\nfrom the filetype.\n\nIssue: #1734" }, { "commit": "db02925c4841efcba96f8eb1b8c3f4255ee63650", "tree": "73eb151a24dd1656a5d77150744a33f3f1770ca7", "parents": [ "62d275318d4854eb100b9f4696474ccfccbe1819" ], "author": { "name": "Avnish Uba", "email": "avnishuba@outlook.com", "time": "Tue May 26 21:14:38 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 26 21:14:38 2026" }, "message": "i#4103 clang-tidy: Remove unused drmemtrace.h include from output.cpp (#7905)\n\nRemoves an unused `drmemtrace.h` include from\n`clients/drcachesim/tracer/output.cpp`.\n\n`clang-tidy` with `misc-include-cleaner` no longer reports the unused\ninclude warning after this change. The project rebuilds successfully\nafter removing the include.\n\nIssue: #4103" }, { "commit": "62d275318d4854eb100b9f4696474ccfccbe1819", "tree": "67017de8f431d3e965ad3a2a76298f7c878489d5", "parents": [ "015037cac992a133b6fbc5e2907d7daadf74f46f" ], "author": { "name": "Jack Gallagher", "email": "jack.gallagher@arm.com", "time": "Tue May 26 10:13:09 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 26 10:13:09 2026" }, "message": "i#7906 Handle more AArch64 cache operations in drmemtrace (#7907)\n\nAdd two cache maintenance operations that were missing from the switch\nin the tracer\u0027s is_aarch64_dcache_flush_op() function:\n\ndc cvap: Data or unified cache line clean by VA to Point of Persistence\n\ndc cvadp: Data or unified cache line clean by VA to Point of Deep\nPersistence\n\nFixes #7906" }, { "commit": "015037cac992a133b6fbc5e2907d7daadf74f46f", "tree": "439ea9cd1bb00d31af8171fdcb9574d6a2a24ebf", "parents": [ "d16eb5746a5fa087e529d870410e37f985d34a41" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Fri May 22 21:52:15 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri May 22 21:52:15 2026" }, "message": "i#1734 top bits: Handle top-byte-ignore addresses in drmemtrace (#7904)\n\nAdds handling of top-byte-ignore load and store addresses in drmemtrace.\nThis is done by taking advantage of bits 48...55 still being required to\nbe in canonical form (all 0\u0027s or all 1\u0027s) on all supported machines,\nwhich severely limits which other records a top-bits-set address can\nimpersonate.\n\n+ Timestamps can be distinguished by expecting reasonable values.\n+ PC records are made distinct by lowering -max_bb_instrs to 126.\n+ Markers are made distinct by using a new\nTRACE_MARKER_TYPE_KERNEL_EVENT_RAW which is turned into\nTRACE_MARKER_TYPE_KERNEL_EVENT in raw2trace. A new invariant check\nensures this _RAW type is not present in final traces; a new unit test\nvalidates the check.\n+ Other types either cannot appear where an address can or always\nprecede an address.\n\nAdds a unit test.\n\nAlso tested on an internal app with real top-byte-ignore addresses that\npreviously broke drmemtrace.\n\nIssue: #1734" }, { "commit": "d16eb5746a5fa087e529d870410e37f985d34a41", "tree": "4324cafa101d5074a634a50012571fe0f9a860a7", "parents": [ "b2587972988db8d54166c71c21ea264f063bc4c9" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu May 14 21:47:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 14 21:47:40 2026" }, "message": "i#7899: Make multi-indir deterministic (#7900)\n\nSets -sched_exit_if_fraction_inputs_left to 0 so our exact instruction\ncount check in the template will always match.\n\nTested: \"ctest --repeat-until-fail 100 -R multi_indir\" now passes\nlocally when before this test would fail every 3 or 4 runs.\n\nFixes #7899" }, { "commit": "b2587972988db8d54166c71c21ea264f063bc4c9", "tree": "76161c8d345c642670d683911f53ecb4b365b24d", "parents": [ "0d5d31e520d85018ba43f96460a1c758500c73ea" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu May 14 17:10:18 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 14 17:10:18 2026" }, "message": "i#6672 C++17: Update 3 places to C++17 (#7898)\n\nTargets 3 places in the code with comments about C++17 enabling simpler\ncode:\n\n+ decode_cache std::unordered_map::try_emplace\n+ schedule_stats_test structured bindings\n+ drpt2trace std::filesystem::file_size\n\nIssue #6672" }, { "commit": "0d5d31e520d85018ba43f96460a1c758500c73ea", "tree": "cc2e3c4b5d7df43e75562b960d89eb967b35c4aa", "parents": [ "810fcace362e83a31ba5554cfcd03b1db7980cc1" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Wed May 13 00:20:25 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed May 13 00:20:25 2026" }, "message": "i#7793: Fix parallel mode support in kernel_filter_t (#7895)\n\nManage state in a shard data object instead of as a class global\nvariable.\n\nIssue: #7793" }, { "commit": "810fcace362e83a31ba5554cfcd03b1db7980cc1", "tree": "aa6d62b87bb92030fdc1a6086607a03bc5c86e04", "parents": [ "84d33d23de756417e7f99a1e48676157e2373d94" ], "author": { "name": "Lorién López Villellas", "email": "lorienlopezv@gmail.com", "time": "Tue May 12 20:41:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 12 20:41:57 2026" }, "message": "Correct EVEX tuple type for AVX-512 gather/scatter (#7896)\n\nAll 16 EVEX AVX-512 gather and scatter data-move instructions were\nmarked with `ttnone` in the decode table so no EVEX compressed\ndisplacement scaling is applied. However, these instructions use the\nTuple1 Scalar (T1S) memory format: the 8-bit `disp8` field must be\nmultiplied by the element size to obtain the actual byte displacement,\ni.e., 4 for 32-bit (`MVd`) operands, 8 for 64-bit (`MVq`) operands.\n\nThe bug is silent when `disp\u003d0` and it manifests when the compiler uses\nbase+displacement addressing, usually in a stack-allocated array, which\nproduces a non-zero `disp8`, for example:\n\n```\nvscatterdpd %zmm3, -0x140(%rbp,%ymm0,8){%k1}\n```\n\n\nHere `disp8 \u003d -40` (0xd8), representing actual displacement `-40 x 8 \u003d\n-320 \u003d -0x140`. With `ttnone`, DynamoRIO stores `-40` in\n`sg_info-\u003edisp`. When `drx_expand_scatter_gather()` expands this into\nscalar stores it emits `[rbp + index*8 - 40]` instead of `[rbp + index*8\n- 320]`, writing to wrong addresses.\n\nI experienced this bug executing the GROMACS molecular dynamics package\nin which some of the data eventually got corrupted.\n\n---------\n\nCo-authored-by: Kyle Huey \u003ckhuey@kylehuey.com\u003e" }, { "commit": "84d33d23de756417e7f99a1e48676157e2373d94", "tree": "16a515a62d25ca8d80fb272a8b2d1cf0bdefa068", "parents": [ "4d6e9ac84316ec4f966f8f67be305e10927d01d0" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue May 12 16:46:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 12 16:46:53 2026" }, "message": "i#7881: Repeatedly try to steal from other cores in scheduler (#7894)\n\nPreviously, a core going idle tried to steal work from other cores just\nonce at the transition to idle. We\u0027ve found this leads to too-uneven\nworkloads with larger core counts and non-negligible idle fractions. To\nsolve, we repeatedly try to steal, at a cadence in idle counts specified\nby a new scheduler parameter steal_attempt_period with a new launcher\noption -sched_steal_attempt_periodj.\n\nTested:\n\nAdds a unit test.\n\nTested on large workloads on many cores where this improves the max\ninstruction ratio among cores from values like 7x down to under 2x.\n\nFixes #7881" }, { "commit": "4d6e9ac84316ec4f966f8f67be305e10927d01d0", "tree": "de3483e9ad5649a520ab126e21b23b443c38c20f", "parents": [ "e9889977525a0206efcc76bc9a442733ecac514a" ], "author": { "name": "Assad Hashmi", "email": "assad.hashmi@arm.com", "time": "Tue May 12 16:37:55 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 12 16:37:55 2026" }, "message": "i#7805: ptrace attach for blocked SUSPEND_SIGNAL and sigwaitinfo (#7843)\n\nThis patch fixes two issues when attaching to threads under DR control:\n1) Thread blocks SUSPEND_SIGNAL (SIGILL on Linux).\n2) Thread is sitting in one of the sigwait syscalls with SUSPEND_SIGNAL\n in its wait set.\nIn both cases the usual signal based attach mechanism cannot be used.\n\nOne solution is to use ptrace for both cases. This is guarded by the\n-attach_unmask_suspend_signal option and implemented on AArch64 Linux\nonly.\n\n1) ptrace unmask:\n - Create a DR client helper thread.\n - Enumerate /proc/\u003cpid\u003e/task and attach to each thread via ptrace.\n - Use PTRACE_{GET,SET}SIGMASK to clear SUSPEND_SIGNAL from each mask.\n - Detach and continue with the normal suspend and takeover loop.\nThis keeps the standard signal based takeover working for threads that\nonly blocked SUSPEND_SIGNAL.\n\n2) ptrace takeover:\n - Detect threads waiting in rt_sigwaitinfo/rt_sigtimedwait and whose\nwait set contains SUSPEND_SIGNAL (using /proc/self/task/\u003ctid\u003e/syscall\n and reading the thread\u0027s sigset).\n - For those threads use ptrace to:\n - Stop and attach to them.\n - Read registers and signal mask.\n - Install a small takeover stub on the stack, detach and resume.\n - os_thread_take_over() then initializes DR state and calls\n d_r_dispatch().\n\nA unit test, api.sigill_blocked, has been added for both cases and a\nbrief description of the -attach_unmask_suspend_signal option added to\nthe \u0027DynamoRIO Runtime Options\u0027 section of the documentation.\n\nThis feature exposed a bug in suite/tests/api/detach_state_shared.c on\nx86-64. The memory permissions and cache consistency check in\ncore/vmareas.c:\nASSERT(!ok || !TEST(MEMPROT_WRITE, prot2) ||\nTEST(FRAG_SELFMOD_SANDBOXED, *flags) ||\n !INTERNAL_OPTION(hw_cache_consistency));\nfailed because the *_from_DR*() tests (self-modifying code) left the\nshared page as RWX. Later, when a *_from_cache*() test (not\nself-modifying code, normal RX) landed on that same page DR expected a\nnormal non-selfmodifying non-writeable fragment in the page, failing\nthe ASSERT().\n\nThe fix makes each *_from_DR*() test restore its page to RX before\nreturning,\nso later *_from_cache*() tests see the expected permissions.\n\nIssue: #7805" }, { "commit": "e9889977525a0206efcc76bc9a442733ecac514a", "tree": "bf4a35b55dc318a19b79bad69025512862714706", "parents": [ "1823dc5bfcde301c04704d1154a2eb0451345c1b" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Fri May 08 16:08:37 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri May 08 16:08:37 2026" }, "message": "i#7889: Zero upper vector on gather to lower bits (#7890)\n\nInvokes the logic to zero the upper bits of the ymm/zmm vector\n(depending on whether the machine supports AVX2 or AVX512), when only\nthe lower bits of it that map to xmm or ymm are gathered into.\n\n#7883 added the zeroing logic already but invoked it only for partial\ngathers where there\u0027s a mismatch between the index and data element\nsizes. Here we invoke it for all cases where the vector gathered into is\nsmaller than the full length supported by the machine.\n\nExtends the allasm_scattergather_x86.asm test to verify that the upper\npart of the vector gathered-into is indeed zeroed. This works fine when\nnot under DynamoRIO which verifies our assumptions.\n\nVerified on a machine with AVX-512 that the tests pass:\n\n```\nThe following tests passed:\n code_api|client.drx-scattergather\n code_api|client.drx-scattergather-bbdup\n code_api|sample.memval_simple_scattergather\n code_api|tool.drcachesim.scattergather-x86\n code_api|tool.drcacheoff.allasm-scattergather-basic-counts\n code_api|tool.drcachesim.allasm-scattergather-basic-counts\n```\n\nAlso verified that each of the new sub-tests fail without the fix.\n\nFixes: #7889" }, { "commit": "1823dc5bfcde301c04704d1154a2eb0451345c1b", "tree": "598693ecb0f45b405b38b13affcefb8d03b53b58", "parents": [ "9803dbf4aa9f06be8a986dcbec8a32cdd4a465e2" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Thu May 07 23:08:39 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu May 07 23:08:39 2026" }, "message": "i#7842: ISA feature AARCH64 bug fix (#7893)\n\nFixes `instr_get_isa_feature()` in AARCH64 where instructions like `bcond`\nwere incorrectly reported with an `\u003cinvalid\u003e` ISA feature in the opcode_mix tool.\nThe root cause was that `instr_get_isa_feature()` instantiated a `decode_info_t`\nstruct without initialization, leaving the `check_reachable` flag containing\nindeterminate stack data.\nWhen this flag happened to be true, the encoding walk of `instr_get_isa_feature()`\nenforced reachability checks on PC-relative operands.\nDepending on how `instr_get_isa_feature()` is used, `pc` is not necessarily the\ninstruction\u0027s actual pc, it can be an unrelated address like a buffer, so disabling\nthe reachability check is necessary.\n\nAdds a unit test that would trigger returning `\u003cinvalid\u003e` ISA feature if the\nreachability check were to be enabled.\n\nIssue #7842" }, { "commit": "9803dbf4aa9f06be8a986dcbec8a32cdd4a465e2", "tree": "adac6121fe2322ae5100246ab7e0bf406e6ff145", "parents": [ "6580104f262b2cfe34d60dec4fbe09f917efdc08" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Wed May 06 20:51:58 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed May 06 20:51:58 2026" }, "message": "i#7695: Allow 32-bit log about AVX-512 not fully supported (#7892)\n\nThis log is printed always on 32-bit because of some missing support\nwhen there\u0027s any AVX-512 instr seen. It should be expected.\n\nTested using x86-32 build on a VM with AVX-512 supported where the\nfollowing tests used to fail without this fix but now pass.\n\n```\n 233 - code_api|client.drx-scattergather (Failed)\n 234 - code_api|client.drx-scattergather-bbdup (Failed)\n 263 - code_api|sample.memval_simple_scattergather (Failed)\n 321 - code_api|tool.drcachesim.scattergather-x86 (Failed)\n```\n\nIssue: #7695" }, { "commit": "6580104f262b2cfe34d60dec4fbe09f917efdc08", "tree": "d4d061a57189abb21543a01f536b3286c0debf74", "parents": [ "97d3db2c9f1d7e64ae23cb5eb83973384f0795f5" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Tue May 05 22:02:02 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 22:02:02 2026" }, "message": "i#7842: Add ISA feature to opcode_mix (#7879)\n\nSubstitutes the `opcode_counts` map with an `opcode_isa_counts`\nmap that counts the frequency of \u003copcode, isa_feature\u003e pairs\ninstead of just opcodes.\nThis map\u0027s key is a newly introduced `struct opcode_isa_feat_t`,\nits hash is constructed by shifting the 32-bit opcode value into the\nupper half of the key and bitwise-ORing it with the 32-bit ISA feature\nconstant, effectively creating a unique identifier for every\n\u003copcode, isa_feature\u003e pair.\nAdds the ISA feature information to the `opcode_mix` output for\nAARCH64, which now looks like:\n```\nOpcode mix tool results:\n 126122 : total executed instructions\n 15924 : bcond (BASE)\n 15171 : stp (BASE)\n...\n```\nThe `opcode_mix` output for other architectures is left unchanged,\nas extracting ISA features (e.g., BASE, SVE, SVE2, etc.) is effectively\nimplemented only for AARCH64, while other architectures always\nreturn `\u003cunknown\u003e` ISA feature at the moment, which would\nunnecessarily pollute the output of `opcode_mix`.\n\nUpdates unit test and end-to-end tests that rely on the output of\n`opcode_mix` accordingly.\n\nIssue #7842" }, { "commit": "97d3db2c9f1d7e64ae23cb5eb83973384f0795f5", "tree": "b428b04237c453fc965f3df796bafcf1b7788fce", "parents": [ "680fc1dc2e80cc58774c6349de0fd99cef9e2ad9" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Tue May 05 18:58:15 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 18:58:15 2026" }, "message": "i#7854 wholesys traces: Fix formal arg name in function declaration (#7888)\n\nThis arg was renamed in #7880 but the definition in header wasn\u0027t.\n\nIssue: #7854" }, { "commit": "680fc1dc2e80cc58774c6349de0fd99cef9e2ad9", "tree": "64a3f2e8465668775631d2cd27b172106b08271a", "parents": [ "f4f488def00d5512b2c9fd84f7f274ab8b2080b9" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Tue May 05 18:20:12 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 18:20:12 2026" }, "message": "i#7678: Zero remaining vec reg on partial x86 gathers (#7883)\n\nAdds logic in the x86 gather expansion to zero out the part of the\nvector register that did not map to any gathered data element. This\nhappens on opcodes like vpgatherqd where the index size is greater than\nthe data size (quarter word index, double word data), so there are fewer\ndata elements than what the destination vector register can hold.\n\nRemoves prior workaround added by #5764 in the scatter-gather test setup\n(explicitly zeroing out the dest vector reg in the app code) which\ndoesn\u0027t fix the underlying issue that the gather expansion was missing\nthe above logic.\n\nTested on a machine where the original test issue was reproduced. All\nthe three scenarios of zero extension are hit in the\ndrx-scattergather-x86.c test macro `TEST_AVX512_GATHER_IDX64_VAL32`, and\nalso the smaller two cases of extension in\n`TEST_AVX2_GATHER_IDX64_VAL32`.\n\nIssue: #7695\nFixes: #7678" }, { "commit": "f4f488def00d5512b2c9fd84f7f274ab8b2080b9", "tree": "5cb3c6e03de3de11288cefeae23a41efffce5f8d", "parents": [ "af5c1cf24fed3354cdfea3c2d619b3c3bf8c3dfd" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Tue May 05 13:19:35 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 13:19:35 2026" }, "message": "i#7854 wholesys traces: Invariant checks for hw cxt markers (#7880)\n\nAugments the invariant checker to identify the\nTRACE_MARKER_TYPE_HARDWARE_EVENT and\nTRACE_MARKER_TYPE_HARDWARE_CONTEXT_RETURN markers.\n\nThis involves treating them similarly to the existing\nTRACE_MARKER_TYPE_KERNEL_EVENT and TRACE_MARKER_TYPE_KERNEL_XFER\nmarkers, and keeping track of the enclosed part of the trace in a\nseparate context.\n\nAlso adds unit tests for the various hardware context marker related\nscenarios.\n\nIssue: #7854" }, { "commit": "af5c1cf24fed3354cdfea3c2d619b3c3bf8c3dfd", "tree": "c5fc865b3ed5c8059616bb88d0a2599033c2780d", "parents": [ "b0d9c6518490282e04fa348ba33b767b1e6ae634" ], "author": { "name": "Jack Gallagher", "email": "jack.gallagher@arm.com", "time": "Tue May 05 11:38:59 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 11:38:59 2026" }, "message": "i#2440 AArch64 IR: Add macros and tests for v8.0 prefetch instructions (#7886)\n\nAdds previously missing INSTR_CREATE_* macros and tests for the v8.0\nprefetch instructions.\n\nIssue: #2440" }, { "commit": "b0d9c6518490282e04fa348ba33b767b1e6ae634", "tree": "dafdd6594c4158286bf11eae3cc994c41e5612d6", "parents": [ "f011de7829ef2ca306d127bd058aa3412771a2c8" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue May 05 03:58:47 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 03:58:47 2026" }, "message": "i#7884: Avoid updating schedule_stats thread set on every record (#7885)\n\nMoves the drmemtrace schedule_stats thread set update from on every\nrecord to every context switch.\n\nProfiling shows this shrinks parallel_shard_memref from 11.2% of\nexecution time down to 1.5% on large 80-core runs. The thread insertion\nwas 8.9% of the 11.2% and now does not even show up in the profile.\n\nFixes #7884" }, { "commit": "f011de7829ef2ca306d127bd058aa3412771a2c8", "tree": "91311ccfbc9b64438dbe90b5cc799161d52c487d", "parents": [ "f4736069a70d4bc41de19b05922ee037f9ab6f15" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue May 05 00:12:52 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue May 05 00:12:52 2026" }, "message": "i#7881 rebalance: Report instruction ratio in schedule_stats (#7869) (#7882)\n\nAdds the ratio of just instructions (as opposed to the existing\n\"activity\" which is instructions+idles for #7860) between the max and\nmin such count for all cores, in the schedule_stats tool. This indicates\nthe schedule balance and is useful for tuning the scheduler\u0027s inter-core\nstealing and rebalancing heuristics.\n\nAdds a unit test.\n\nIssue: #7881" }, { "commit": "f4736069a70d4bc41de19b05922ee037f9ab6f15", "tree": "50a8dd45392341dd201e47863f34c89d7fd10822", "parents": [ "20df306dfbfb0456abc4b225b0019e86fd3a96cb" ], "author": { "name": "Dmitriy Petrov", "email": "dmitry.s.petrov@gmail.com", "time": "Sun May 03 19:25:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun May 03 19:25:40 2026" }, "message": "i#7590: Cache replacement policy configuration (#7837)\n\nImplemented parsing nested structure containing cache replacement policy\nconfiguration\n\nUse cache replacement policy with default parameters\n replace_policy \u003cname\u003e\n\nDefine custom parameters for cache replacement policy\n replace_policy{\n type \u003cname\u003e # Cache replacement policy name\n # Cache replacement policy parameters\n }\n\nAvailable parameters for RRIP policy are:\n- rrpv_bits\n- rrpv_period\n- rrpv_long_per_period\n\nFixes #7590" }, { "commit": "20df306dfbfb0456abc4b225b0019e86fd3a96cb", "tree": "93153742de79d9e4b16c51f0042aa7db80879067", "parents": [ "0eed3e54242ebbfe9655d34afb79fd4849a04978" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Apr 30 19:19:12 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 30 19:19:12 2026" }, "message": "i#7860 load bal: Add load balancing to drmemtrace analyzer (#7878)\n\nWhen running drmemtrace analyzers with dynamic scheduling (i.e.,\ncore-sharded with live scheduling instead of replay), we want our worker\nthreads to have relatively even \"activity\" as seen by a simulator for a\nreasonable final virtual schedule. Atomic activity counts are\nperiodically updated and examined to accomplish this. If a worker\u0027s\nactivity reaches a specified ratio versus the slowest worker, it sleeps\nuntil it is under the ratio. A new CLI flag --max_load_imbalance sets\nthe max ratio; the default is 2.5.\n\nAdds a unit test, though it would likely become flaky if waiting were\nrequired. Confirmed manually that there is waiting in the 3 fast workers\nfor the slow worker #0 who ends up with fewer instructions but within\nthe ratio (there are no idles in this test):\n```\n12: [analyzer] Worker 2 @3000 waiting for slowest 3 @1000\n12: [analyzer] Worker 3 @13000 waiting for slowest 0 @1000\n12: [analyzer] Worker 1 @14000 waiting for slowest 0 @1000\n12: [analyzer] Worker 0 waited 0 times for load balancing\n12: [analyzer] Worker 1 waited 71 times for load balancing\n12: [analyzer] Worker 3 waited 71 times for load balancing\n12: [analyzer] Worker 2 waited 71 times for load balancing\n12: shard 0 saw 215000 instructions\n12: shard 1 saw 530000 instructions\n12: shard 2 saw 535000 instructions\n12: shard 3 saw 530000 instructions\n```\n\nTested on larger traces on 80 cores with a live max of 60 with target\nratios at 2.0, 2.5, and 3.0, which were precisely hit in two consecutive\nruns each with the 100K check cadence settled on in the code here\n(auto-raising to 1M or higher reduces accuracy with some ratios climbing\ntoo high). The check_load_balance() function does show up in some\nprofiles as high as 3.3% but seems worth the cost. When reducing below\n1.5, targets are hard to reach, and\nthe overhead does go up: check_load_balance() is 4.6% in a 1.25-target\nrun and 15% in a 1.0 run in these experiments, with the ratio not\ndropping under 1.5: so 1.5 may be a practical limit, as noted in the\noption description, for now: which should be fine for initial use cases.\n\nFixes #7860" }, { "commit": "0eed3e54242ebbfe9655d34afb79fd4849a04978", "tree": "81715cea3a8c60c7706670f27d4018aeda38500f", "parents": [ "c966f3a16101d274c9c98acd0aa7ccb3639042db" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Wed Apr 29 23:29:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 29 23:29:40 2026" }, "message": "i#7842: Add ISA feature APIs for remaining architectures (#7875)\n\nAdds a trivial implementation of `instr_get_isa_feature()` and\n`instr_get_isa_feature_name()` public APIs for X86, ARM, and\nRISCV64 architectures.\nThis trivial implementation always returns `ISA_FEAT_UNKNOWN`\nand `\u003cunknown\u003e` respectively.\nAdds TODO to remind us to actually implement these APIs at\nsome point.\nAdds (trivial) unit tests, mostly useful to check that we can actually\ncall the above public APIs for these architectures.\n\nIssue #7842" }, { "commit": "c966f3a16101d274c9c98acd0aa7ccb3639042db", "tree": "5f9b0eceeb8e65c5c856ab9845f73839a2f0405c", "parents": [ "62539f980adf5e84cf4b2cd548750f950eb6489e" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Apr 29 17:06:15 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 29 17:06:15 2026" }, "message": "i#7868: Add record_schedule_stats tool version (#7874)\n\nTemplatizes the schedule_stats tool to provide a trace_entry_t \"record_\"\nversion which can be run alongside record_filter for better statistics\nwhen creating new core-sharded-on-disk traces (running afterward\nloses some stats only available from the live scheduler).\n\nTested:\n\nAdded a new regression test tool.record_filter_plus_stats.\n\nAlso tested manually:\n```\n$ bin64/drrun -t drmemtrace -core_sharded -tool record_filter:schedule_stats -cores 3 \\\n-indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -verbose 1 -outdir foo\n...\nCore #0 schedule: DEA__A_A__A_A_D_E_A_D\nCore #1 schedule: CGH__H____C_____________\nCore #2 schedule: IBF_____BF__F______\n...\n$ ls -sh foo\ntotal 992K\n4.0K cpu_schedule.bin.zip 356K drmemtrace.core.000002.trace.zip\n236K drmemtrace.core.000000.trace.zip 4.0K serial_schedule.bin.gz\n392K drmemtrace.core.000001.trace.zip\n```\n\nFixes #7868" }, { "commit": "62539f980adf5e84cf4b2cd548750f950eb6489e", "tree": "859fd21081827eb277cafcd353819acf1f59b9f3", "parents": [ "b877b64fa841f29afb792bd80418d14a4ca3ba0f" ], "author": { "name": "Jack Gallagher", "email": "jack.gallagher@arm.com", "time": "Wed Apr 29 14:41:37 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 29 14:41:37 2026" }, "message": "i#2440 AArch64 IR: Add macros and tests for v8.1 LSE instructions (#7877)\n\nAdds previously missing INSTR_CREATE_* macros for v8.1 LSE atomic\ninstructions and IR tests that make use of the macros.\n\nIssue: #2440" }, { "commit": "b877b64fa841f29afb792bd80418d14a4ca3ba0f", "tree": "2b34d96fb1b041d487ac84afbbf948632fd19f26", "parents": [ "8bac6247d6c202d499a75d1800c451b18d465234" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Apr 28 01:32:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Apr 28 01:32:21 2026" }, "message": "i#6684 csod invariants: Report shard id instead of tid (#7871)\n\nFor core-sharded traces, the invariant checker should report the shard\nindex instead of the tid, since the ordinals and timestamp data it\u0027s\nreporting are for the current shard and are not per-software-thread.\n\nUpdates the unit test.\n\nIssue: #6684" }, { "commit": "8bac6247d6c202d499a75d1800c451b18d465234", "tree": "19776dfeb8feba862ac2bb38f38467d3d4e2d5c8", "parents": [ "1edbd43db7fabeb5cae41c2bf26a4b38dbc3429b" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Mon Apr 27 21:01:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Apr 27 21:01:53 2026" }, "message": "i#6684 csod invariants: Disable thread exit check for core-sharded (#7870)\n\nDisables the \"Thread is missing exit\" drmemtrace invariant check for\ncore-sharded traces where even if we switch to per-software-thread\ntracking of exit records we would still have errors from the scheduler\nexiting early to avoid tail artifacts.\n\nAdds a unit test; confirmed it fails without the fix:\n```\n$ ctest -V -R checker_test\n16: Recording |Thread is missing exit| in T-1 @ ref # 6 (3 instrs since timestamp 0)\n16: Unexpected error: Thread is missing exit at ref: 6\n16: invariant_checker_test FAILED\n1/1 Test #16: tool.drcachesim.invariant_checker_test ...***Failed 0.04 sec\n```\n\nIssue: #6684" }, { "commit": "1edbd43db7fabeb5cae41c2bf26a4b38dbc3429b", "tree": "3d245dde91dfcc27c0ced85797699b162b0c309c", "parents": [ "c955231f891d96804f80f5052509bc1f57dddedc" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Mon Apr 27 20:25:02 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Apr 27 20:25:02 2026" }, "message": "i#7872: Remove CMake 3.19.7 pinning for x86 Linux CI (#7873)\n\nRemoves the CMake 3.19.7 pinning as that version is no longer available\nvia the action step we\u0027re using.\nThe newer CMake versions seem to not have the problem that 3.20 had.\n\nFixes #7872\nFixes #4830" }, { "commit": "c955231f891d96804f80f5052509bc1f57dddedc", "tree": "a00c4c39df4e30aad90fdcfc3154d2ec1d6606ac", "parents": [ "2f71ef5f526d477f7608fc1dfb2a125cbe523374" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Apr 23 22:15:51 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 23 22:15:51 2026" }, "message": "i#7860 core balance: Report core ratio in schedule_stats (#7869)\n\nAdds the ratio of instructions+idles between the max and min such count\nfor all cores, in the schedule_stats tool. This is to indicate the load\nbalancing when fed into a microarchitectural simulator; this also gives\na good idea of the worker thread load balancing for analyzers (though\nloads/stores and markers are not included).\n\nAdds a unit test.\n\nIssue: #7860" }, { "commit": "2f71ef5f526d477f7608fc1dfb2a125cbe523374", "tree": "05ab387fd6676eef42970137387b14502dd08c6d", "parents": [ "427369a5cf8b67e5bb5d1580c9c6d1d86974a4fc" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Apr 23 14:17:31 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 23 14:17:31 2026" }, "message": "Align client thread stack on aarch64 (#7866)\n\nEnsures the client thread stack is aligned on aarch64. It happens to be\naligned today but it is fragile.\n\ncreate_clone_record() aligns to XSTATE_ALIGNMENT which is set to\nREGPARM_END_ALIGN, which was 8 on AArch64. Here we change it to 16,\nalong with adding an insurance alignment inside dynamorio_clone() (just\nlike we have on x86)." }, { "commit": "427369a5cf8b67e5bb5d1580c9c6d1d86974a4fc", "tree": "10d5ada08bceb06b090bd17b2d0378869f539c22", "parents": [ "b6ba85b29dfb782e7047f2d9211307d190b0c043" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Apr 22 20:49:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 22 20:49:57 2026" }, "message": "i#7839 direct fallback: Use rwlock to reduce contention (#7867)\n\nThe drmemtrace scheduler direct_switch_fallbacks feature\u0027s lock was\nadding so much contention it was causing uneven schedules. Switching to\na read-write lock solves that.\n\nTested on a large 80-virtual-core scheduling with\ndirect_switch_fallbacks turned on. Without the fix, we consistently see\na couple of cores with 100x fewer total records (instructions + idles)\nthan the busiest cores. Profiling showed lock contention as a problem.\nWith the fix, the least busy core\u0027s record count is only 2x smaller than\nthe busiest core, which is about what we see on a real run (instruction\ncount, without tracing). This also matches what we see with drmemtrace\nscheduling with direct_switch_fallbacks turned off. Additionally, a\nprofile shows the lock contention on the direct_target_lock is no longer\na bottleneck.\n\nIssue: #7839" }, { "commit": "b6ba85b29dfb782e7047f2d9211307d190b0c043", "tree": "385fb0fd2880771b99fc5c82824f12a99ebb2faf", "parents": [ "251cf78a227589bd97587439ae3af496d41ccdef" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Apr 22 01:19:56 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 22 01:19:56 2026" }, "message": "i#6672 C++-17: Fix Android32 CI status arguments (#7865)\n\nRemoves format arguments accidentally not removed in PR #7864.\n\nIssue: #6672" }, { "commit": "251cf78a227589bd97587439ae3af496d41ccdef", "tree": "146b33a315ae58bfd8e7f0b6d8f9d7c6d76f7277", "parents": [ "b829bbbff984dd9f1356f8d49768c5eeea17586a" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Apr 21 21:24:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Apr 21 21:24:40 2026" }, "message": "i#6672 C++17: Upgrade to C++17 everywhere (#7863)\n\nUpdates from C++14 to C++17 as all our regression test toolchains\nsupport it and it\u0027s needed for some new code.\n\nFixes #6672" }, { "commit": "b829bbbff984dd9f1356f8d49768c5eeea17586a", "tree": "5d85e6997ad0a8b4acde1c4dae9ec6f0a2c64422", "parents": [ "10f13a8ad4916f8f7a1e1ba57149154f860e5645" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Apr 21 20:49:58 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Apr 21 20:49:58 2026" }, "message": "i#6672 C++17: Remove Android 32-bit CI (#7864)\n\n32-bit Android is no longer supported in mainstream Android, and the\ntoolchain we were using doesn\u0027t support C++17 to which we\u0027d like to\nupgrade. We\u0027ve decided it is not worth the effort to upgrade the Android\nNDK and get it to work with our 32-bit build given the lack of 32-bit\nAndroid devices. We\u0027re dropping the CI build and removing it from the\nrequired builds for merges. We\u0027ll leave other support in the code base\nfor now.\n\nIssue: #6672" }, { "commit": "10f13a8ad4916f8f7a1e1ba57149154f860e5645", "tree": "0748761c00d4e104189cdb05bf2314202579498a", "parents": [ "e06864443addddea396790d4fd588a38421ebbed" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Mon Apr 20 20:55:02 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Apr 20 20:55:02 2026" }, "message": "i#7842: Add AARCH64 ISA feature APIs (#7846)\n\nAdds two public APIs to obtain the ISA feature (e.g., SVE, SVE2 etc.)\nof a AARCH64 instruction:\n- `instr_get_isa_feature()`: performs an encoding walk and returns a\n `ISA_FEAT_` enum constant.\n- `instr_get_isa_feature_name()`: returns the string name of a\n `ISA_FEAT_`.\n\nThey both rely on new, automatically generated header files from\n`codec_*.txt`: `isa_feature_gen_*.h` (contains the functions for the\nencoding walk, similar to `encode_gen_*.h`), `isa_features.h` (contains\nthe `ISA_FEAT_` enum), `isa_feature_names.h` (contains the\ncorresponding `ISA_FEAT_` names in string format).\n\nAdds a unit test.\n\nIssue #7842" }, { "commit": "e06864443addddea396790d4fd588a38421ebbed", "tree": "c16ab2750dc1f9071aa1d0e6aca5fa9bed49240a", "parents": [ "1f94d2576caaeb50bb1b934f590f7cd0bef76afe" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Fri Apr 17 22:47:44 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Apr 17 22:47:44 2026" }, "message": "i#7860 load bal: Make analyzer logs visible in release build (#7861)\n\nMakes VPRINT defined in release build for the analyzer. The usefulness\nfor diagnostics outweighs any overhead from extra branches.\n\nTested:\n\nBefore, in a non-DEBUG build directory:\n```\n$ bin64/drrun -t drmemtrace -tool basic_counts -infile ../src/clients/drcachesim/tests/drmemtrace.allasm_x86_64.trace.zip -verbose 1 2\u003e\u00261 | grep analyzer\n```\n\nAfter:\n```\n$ bin64/drrun -t drmemtrace -tool basic_counts -infile ../src/clients/drcachesim/tests/drmemtrace.allasm_x86_64.trace.zip -verbose 1 2\u003e\u00261 | grep analyzer\n[analyzer] Creating 12 worker threads\n[analyzer] Worker 0 starting on trace shard 0 stream is 0x55f2e2113110\n[analyzer] Worker 0 finished trace shard drmemtrace.allasm_x86_64.trace.zip\n```\n\nIssue: #7860" }, { "commit": "1f94d2576caaeb50bb1b934f590f7cd0bef76afe", "tree": "c6ef6ea4bb5b41b7f859d9336f0d348b9c049572", "parents": [ "0a276b2491dd0a867c053fb019c6e27713d2363b" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Fri Apr 17 17:39:55 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Apr 17 17:39:55 2026" }, "message": "i#7854 wholesys traces: Support markers in counts and view tool (#7857)\n\nAdds support for the new TRACE_MARKER_TYPE_HARDWARE_EVENT and\nTRACE_MARKER_TYPE_HARDWARE_CONTEXT_RETURN to the drmemtrace basic_counts\nand view tools.\n\nIssue: #7854" }, { "commit": "0a276b2491dd0a867c053fb019c6e27713d2363b", "tree": "ea3448c1a57f668d2d61bad034d2c4d76ad15605", "parents": [ "5d6377e618f4c71d67ff30aae46c6f7747bb57bc" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Fri Apr 17 17:09:49 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Apr 17 17:09:49 2026" }, "message": "i#7858: Workaround std::regex_search crash in core_sharded_test (#7859)\n\ncore_sharded_test invokes std::regex_search over the analyzer output\nafter sharding into 11 cores. This invocation has started crashing with\na stack overflow recently, without any inciting change in DR itself. To\nworkaround, we reduce the string to regex search over by extracting\nstats only for the relevant core (or total stats).\n\nFixes: #7858" }, { "commit": "5d6377e618f4c71d67ff30aae46c6f7747bb57bc", "tree": "65fde8c00e63b559146ad6aa2c99225862cd2d42", "parents": [ "ea55f493c2d3fe084e699affd5c97fa718c2d697" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Thu Apr 16 13:21:51 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 16 13:21:51 2026" }, "message": "i#7854 whole sys traces: Add new markers and file type (#7856)\n\nAdds a new offline_file_type_t to denote drmemtraces derived from the\nwhole system view of events: OFFLINE_FILE_TYPE_WHOLE_SYSTEM. Such traces\nmay be recorded using hardware tracing techniques such an Intel-PT or\nETM, or hardware emulation on QEMU-TCG. They have events from the user\nand kernel execution on the system, from the target process and possibly\nuser/kernel processes too on the system.\n\nAdds two new trace_marker_type_t to describe events seen on a hardware\nthread: TRACE_MARKER_TYPE_HARDWARE_EVENT to describe an\ninterrupt/exception, and TRACE_MARKER_TYPE_HARDWARE_CONTEXT_RETURN to\ndescribe a context return.\n\nFuture PRs will adapt the drmemtrace invariant checker to relax some\nexisting checks and add some new ones for OFFLINE_FILE_TYPE_WHOLE_SYSTEM\ntraces.\n\nIssue: #7854" }, { "commit": "ea55f493c2d3fe084e699affd5c97fa718c2d697", "tree": "e545a50263255b2b09073c500d93013a993cb9e0", "parents": [ "67736ec87444574ef7164d825e248a184859eaa7" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Thu Apr 09 22:59:46 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 09 22:59:46 2026" }, "message": "i#7725 Negative time: Allow 4us negative time in drmemtraces (#7853)\n\nIncreases the allowed negative time delta from 2us to 4us to handle\nobserved 4us decreases from kernel timestamp anomalies.\n\nUpdates the unit test.\n\nIssue #7725" }, { "commit": "67736ec87444574ef7164d825e248a184859eaa7", "tree": "adf4560b6ffaa77e07923ea7ccd1e2d15854ab26", "parents": [ "3f8fbfdd608cc11a651ab70e34ab58ca3c9a31f8" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Thu Apr 09 22:57:24 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 09 22:57:24 2026" }, "message": "i#7851 AArch64: Fix unchecked return values in codec.c (#7852)\n\nFixes multiple instances in `core/ir/aarch64/codec.c` where the return\nvalue of `encode_opnd_int()` was ignored. This ensures that encoding\nfailures are correctly propagated rather than resulting in silent errors.\nThis also fixes cases where the output variable of `encode_opnd_int()`\nwas left uninitialized (because `encode_opnd_int()` failed returning\n`false`) but still used afterward. Furthermore, in some cases, `false`\ninstead of `0` was passed as 4th argument to `encode_opnd_int()`.\n\nIssue #7851" }, { "commit": "3f8fbfdd608cc11a651ab70e34ab58ca3c9a31f8", "tree": "669f59a72561e574512465156a6a487632f1203b", "parents": [ "a175c721ddfbfddc020bd9426172a97072a0dd6c" ], "author": { "name": "Jack Gallagher", "email": "jack.gallagher@arm.com", "time": "Thu Apr 09 06:42:17 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 09 06:42:17 2026" }, "message": "i#7741: Fix scheduler deadlock (#7850)\n\nscheduler_impl_tmpl_t::next_record() was trying to acquire an input lock\nwhile it still held the lock for the previous input. This caused the\ntest tool.drcacheoff.analysis_unit_tests to hang occasionally. I have\nrun the test 100,000 times with the fix and observed no more hangs.\n\nFixes #7741" }, { "commit": "a175c721ddfbfddc020bd9426172a97072a0dd6c", "tree": "4fc7d32b8abe614afd165e9b2fb38f3dbd95deb8", "parents": [ "a93fc1741272468b06ea38d42f76b278286ed6e1" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Mon Apr 06 20:58:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Apr 06 20:58:21 2026" }, "message": "i#5843 scheduler: Increase quantum_duration_instrs to 20M (#7848)\n\nRaises the default drmemtrace time quantum when counting instructions\nfrom 10 million to 20 million. This is a more reasonable value for\ntypical clock speeds and application IPC metrics: 3GHz @ 1.33 IPC over\n5ms is 20 million instructions. This raise also helps improve context\nswitch rate metric matching for large internal applications.\n\nIssue: #5843" }, { "commit": "a93fc1741272468b06ea38d42f76b278286ed6e1", "tree": "1077ab44c664a1320756e4c3df14fe73e8ac37c5", "parents": [ "73911098eb106f300d54f793d13ca9fe8453515a" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Apr 02 20:19:16 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Apr 02 20:19:16 2026" }, "message": "i#7832 random-init: Enable random_initial_layout by default (#7847)\n\nTurns on the drmemtrace scheduler option random_initial_layout by\ndefault, with a seed of 1. This changes the default from a round robin\nlayout in input order to a random layout, which should avoid potential\nartifacts from whatever order the inputs happen to be in (often just\nfile order on disk), though we do not expect significant differences as\nexperiments on large traces show minmimal impact of the initial layout.\nUsing a fixed seed means the layout should be reproducible across runs\nwhich is important for testing and debugging.\n\nDisables the option for many scheduler unit tests which have hardcoded\nassumptions about which input is on which output.\n\nIssue: #7832" }, { "commit": "73911098eb106f300d54f793d13ca9fe8453515a", "tree": "1f7d21f4d4a430df93c37512ba8379031cead8b5", "parents": [ "ab103cf6677ea0d8719ef802f7c074bda1297f9c" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Apr 01 21:44:57 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Apr 01 21:44:57 2026" }, "message": "i#5843 scheduler: Increase blocking_switch_threshold to 600 (#7844)\n\nRaises the default blocking_switch_threshold from 500 to 600. This is\nbased on comparisons of context switch rates on large server\napplications where even with time scaling there are too many switches\nfrom poller threads. This relatively slight increase does make a\ndifference on these applications and makes the switch rates match real\nrates more closely.\n\nIssue: #5843" }, { "commit": "ab103cf6677ea0d8719ef802f7c074bda1297f9c", "tree": "0c8a354abb70448327ecc19b5bfb6c78fbf5fe19", "parents": [ "58fd06186b625dbfac97dcd6783570ea29abc43f" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 24 16:44:38 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 24 16:44:38 2026" }, "message": "Shrink reader_t encoding size in half (#7841)\n\nThe reader_t encoding map show up as using significant memory on our\nlarge traces with many threads, each with its own encoding map.\n\nWe shrink the encoding_info_t from 32 bytes to 16 bytes by:\n+ Shrinking the size field from size_t to unsigned char\n+ Shrinking the max encoding length from 17 to 15. It turns out recent\nIntel manuals specify 15 as the maximum guaranteed to be supported so\nthis shouldn\u0027t cause any downsides; if someone was tracing binaries with\ncorner case encodings they might have had problems with the 17 limit in\nany case as some hardware might happen to work with larger." }, { "commit": "58fd06186b625dbfac97dcd6783570ea29abc43f", "tree": "1d64e04dbcae5fb0edfb013a815f80b57efb542f", "parents": [ "372c0dbbb8354d3a4c22a286f53954d43d52764a" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 24 02:17:50 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 24 02:17:50 2026" }, "message": "i#7839: Pick alternate target on direct switch failure (#7840)\n\nIn the drmemtrace scheduler, if a direct switch\u0027s target is unavailable,\nby default a local switch is performed. This reduces the migration count\nof the schedule. To remedy this, a new option direct_switch_fallbacks is\nadded. When enabled, if a direct switch target is not found, an\nalternate is searched for among all prior direct targets.\n\nAdds a unit test.\n\nIssue: #7839" }, { "commit": "372c0dbbb8354d3a4c22a286f53954d43d52764a", "tree": "091f49b970a15c6a14f51c003ae844de99e57a09", "parents": [ "1202f1f85bbddb2e81d338170ac4e955d39fd9c2" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Mar 19 15:33:56 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Mar 19 15:33:56 2026" }, "message": "i#6822 unscheduled: Add option to check unscheduled latencies (#7838)\n\nAdds a new drmemtrace scheduler flag ignore_low_latency_unsched which if\nset causes unschedule requests to only take effect if their syscall\nlatency is over the maybe-blocking threshold. This can help deflate\nthese requests if tracing overhead has inflated their frequency.\n\nAdds a unit test.\n\nIssue: #6822" }, { "commit": "1202f1f85bbddb2e81d338170ac4e955d39fd9c2", "tree": "3f43bd9ef57707ecbbcec355157cea1c742cbfff", "parents": [ "602dc8d97a73c0c51d0fa1ed993e2399725218d3" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Thu Mar 19 00:54:44 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Mar 19 00:54:44 2026" }, "message": "i#7685 DrPoints: add documentation page (#7836)\n\nAdds documentation for the DrPoints client that describes the intent\nof the client, its options with examples, and its current limitations.\n\nIssue #7685" }, { "commit": "602dc8d97a73c0c51d0fa1ed993e2399725218d3", "tree": "0c6c2548977ac0d26ffe2e5c05227ab6cce1748a", "parents": [ "6df94990101c812b2a8bb219d93f045a7913173c" ], "author": { "name": "Bin Wang", "email": "binwang@umass.edu", "time": "Thu Mar 12 21:39:20 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Mar 12 21:39:20 2026" }, "message": "i#7831: Skip all non-syscall markers in `should_omit_syscall()` (#7830)\n\nCurrently `should_omit_syscall()` only skips timestamps and CPU_ID\nmarkers while searching for the SYSCALL marker. If other markers (e.g.,\na WINDOW_ID marker) appear between the syscall instruction and the\nSYSCALL marker, the syscall instruction will be omitted while the\nSYSCALL marker is left behind.\n\nWe fix this by skipping other non-syscall markers in\n`should_omit_syscall()`.\n\nFixes #7831" }, { "commit": "6df94990101c812b2a8bb219d93f045a7913173c", "tree": "afd52cbf7d5c6c61a32d62969009b7f4aa64f36e", "parents": [ "a90bfced7a6da899bc9b668004eb04bc17fb19cc" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 10 22:16:26 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 10 22:16:26 2026" }, "message": "i#7447: Fix ninja rebuild problem (#7834)\n\nFixes a problem with ninja incorrectly rebuilding targets by using an\nexplicit target for the loader script used to set the preferred base and\nother aspects of our libaries. An explicit custom target with a\ndependence provides a top level output which works properly with ninja;\nninja does not work well with the cmake PRE_LINK we were using.\n\nTested in a fresh config where repeated \"ninja\" does nothing as it\nshould where before it kept rebuilding libraries.\n\nFixes #7447" }, { "commit": "a90bfced7a6da899bc9b668004eb04bc17fb19cc", "tree": "439a7f4d83a34c786f55eedeffe1d9560ac6277e", "parents": [ "475a52253907f47ffa321735f756e39b48decaad" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 10 20:00:07 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 10 20:00:07 2026" }, "message": "i#7832: Add random layout drmemtrace scheduler feature (#7833)\n\nAdds a new drmemtrace scheduler option and command-line flag to use a\nrandom assignment of inputs to outputs instead of the default round\nrobin, to provide more variety in scheduling.\n\nAdds a unit test of the option. The command-line flag was tested\nmanually (it is not easy to make automated tests of randomness).\n\nRun round-robin default:\n\n```\n$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats\nCore #0 schedule: CB_____CB______\nCore #1 schedule: DF_____D_F_D_F\nCore #2 schedule: EA__A_A__A_A_E_A______\nCore #3 schedule: G____________________________________\nCore #4 schedule: H__H______________________________\nCore #5 schedule: I_____________________________________\n```\n\nNow run twice with a clock seed, showing the varying layout each time:\n```\n$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 0\nCore #0 schedule: A__A_A__A_A__A______________\nCore #1 schedule: CB_____CB\nCore #2 schedule: HI__H__________________________\nCore #3 schedule: E_____E______________\nCore #4 schedule: GF_____F__F_________\nCore #5 schedule: D_____D_D_______________\n$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 0\nCore #0 schedule: C_____C_____________________\nCore #1 schedule: H__H________________________________\nCore #2 schedule: A__A_A__A_A__A__________________\nCore #3 schedule: EI_____E____________________\nCore #4 schedule: DF_____D_F_D_F\nCore #5 schedule: GB_____B________________________\n```\n\nNow run twice with the same seed, showing repeatable randomness (though\nwe have record-replay for repeating the entire scheme, there can be\ntimes where we want to fix a particular random outcome while varying\nother unrelated parameters, so it is useful to be able to set the seed):\n```\n$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 1\nCore #0 schedule: DE_____D_E_D\nCore #1 schedule: CG_____C________________\nCore #2 schedule: HF__H____F__F______\nCore #3 schedule: A__A_A__A_A__A______________\nCore #4 schedule: I______________________________\nCore #5 schedule: B_____B__________________\n$ bin64/drrun -t drmemtrace -indir ../src/clients/drcachesim/tests/drmemtrace.threadsig.x64.tracedir -cores 6 -tool schedule_stats -sched_random_initial_layout 1\nCore #0 schedule: DE_____D_E_D\nCore #1 schedule: CG_____C_______________\nCore #2 schedule: HF__H____F__F________\nCore #3 schedule: A__A_A__A_A__A______________\nCore #4 schedule: I______________________________\nCore #5 schedule: B_____B__________________\n```\n\nFixes #7832" }, { "commit": "475a52253907f47ffa321735f756e39b48decaad", "tree": "f2288576b7e55e912616f0bd5faafcac48f0f73b", "parents": [ "753834b02a5312dce13412dd269a7483a259e63d" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Thu Mar 05 02:26:17 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Mar 05 02:26:17 2026" }, "message": "i#7796 doxygen: Fix unresolved link requests (#7829)\n\nFixes warnings (treated as errors):\n```\nwarning: explicit link request to\n\u0027func_trace_t::TRACE_FUNC_ID_SYSCALL_BASE\u0027\ncould not be resolved\n```\n\nBy fully qualifying `func_trace_t`.\n\nRelated issue in the doxygen repo:\nhttps://github.com/doxygen/doxygen/issues/10713\n\nFixes #7796" }, { "commit": "753834b02a5312dce13412dd269a7483a259e63d", "tree": "f3c788108c8c91c08999612e3e6801e08736b5cc", "parents": [ "ac5298bb64c958fd83e5950a8c3cc8f308c674bf" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Mar 04 22:46:54 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Mar 04 22:46:54 2026" }, "message": "i#7796 doxygen: Fix quote character parsing issues (#7828)\n\nEscapes quote characters in three places in doxygen comments to avoid\nerrors from doxygen 1.15.\n\nRemoves a stray backtick left in the middle of building.dox which caused\nparsing errors.\n\nSome enum class link errors remain for 1.15; work on those is still in\nprogress.\n\nIssue: #7796" }, { "commit": "ac5298bb64c958fd83e5950a8c3cc8f308c674bf", "tree": "b0824a76f35981c67aba9ac184de5b7cd34dc4d4", "parents": [ "eacfd2098fc87ff00f3523b95689e22a36958fe9" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 03 18:10:39 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 03 18:10:39 2026" }, "message": "i#7826: Fix drx time scale verbose\u003d2 null dereferences (#7827)\n\nFixes drx time scale crashes when verbosity is raised to 2+ and an\nepoll_pwait2 system call is invoked by the app with a null (infinite)\ntimeout.\n\nAdds a test case of a null timeout to epoll_pwait2.\n\nTested by raising verbosity and observing a crash with the fix and no\ncrash without the fix.\nAlso tested on the internal test that first hit this issue.\n\nFixes #7826" }, { "commit": "eacfd2098fc87ff00f3523b95689e22a36958fe9", "tree": "4b55338855360cc26bd8aae8dceb7620ec28987f", "parents": [ "a22ebe30b97a8a29eabe532c65beb2dac402411e" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Mar 03 16:08:44 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Mar 03 16:08:44 2026" }, "message": "Handle empty module full_paths in drmemtrace func_trace (#7825)\n\nWe\u0027ve seen crashes in drmemtrace func_trace code which seem to be from\nnull module full_path fields. This has been seen elsewhere, and other DR\ncode checks for null in this field. We add such null checks to\nfunc_trace.\n\nEnd-to-end testing is difficult as we do not fully understand when the\npath is completely absent. There are no unit tests set up for these\nfunc_trace functions; leaving that as beyond the scope of this simple\nfix." }, { "commit": "a22ebe30b97a8a29eabe532c65beb2dac402411e", "tree": "fafa5035e4519366953f2979f6b3754ebab0c23f", "parents": [ "975776126f50e45e19178b600dbf28ddde84b0e2" ], "author": { "name": "Gandholi Sarat", "email": "gandholisarat@gmail.com", "time": "Mon Mar 02 05:34:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Mar 02 05:34:45 2026" }, "message": "i#1840: Add helpful error if /proc is not mounted on Linux (#7814)\n\nAdds a Linux-only check during core initialization to verify that\n/proc is mounted when running in managed mode. If not, DynamoRIO\nemits a clear and actionable usage error instead of failing later\nwith a confusing loader error.\n\nThe check is guarded by !standalone_library so it applies to all\nmanaged modes (injection, dr_app, attach/detach) while excluding\nstandalone/library-only usage such as drdecode.\n\nFixes #1840." }, { "commit": "975776126f50e45e19178b600dbf28ddde84b0e2", "tree": "0d9e65e49ebc160ef80230d249d81f85bf9c70b1", "parents": [ "fd1ead7bec116bce6d281b04ac5e2958f010ee41" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Feb 24 18:38:18 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 24 18:38:18 2026" }, "message": "i#7821: Undefine bool to fix clang-17 build (#7822)\n\nThere is a define of bool coming from some system header on clang-17 on\nMac. It only affects the optionsx.h expansion, and undefining there\nsolves it while a top-level undefine does not.\n\nFixes #7821" }, { "commit": "fd1ead7bec116bce6d281b04ac5e2958f010ee41", "tree": "e13e53aab16cb95ca2d39edd982fbb7d7a44f3ef", "parents": [ "466b3212827fea867429d611a16fed44227d256e" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Feb 24 18:38:09 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 24 18:38:09 2026" }, "message": "i#7819: Only count user instrs for switch stats (#7820)\n\nUpdates schedule_stats to only count user-mode instructions for context\nswitch data in both the switch history output and the context switch\nrate histogram output, since our traces do not have accurate kernel content.\n\nUpdates the unit tests to check for this.\n\nFixes #7819" }, { "commit": "466b3212827fea867429d611a16fed44227d256e", "tree": "bac58bf364a534fa69331ad86e04bb41b01162b2", "parents": [ "7d73f0b8b733a92ed7acf7bbf3f63d7b809a3f5a" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Tue Feb 24 03:14:32 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 24 03:14:32 2026" }, "message": "i#7685 DrPoints: Progressive writing of BBVs (#7815)\n\nDrPoints previously stored all Basic Block Vectors (BBVs) in memory\nuntil program exit, which could lead to out-of-memory issues for\nlong-running executions or programs with a large number of BBs\nexecuted. This PR introduces the `-save_bbv_every` option, allowing\nusers to specify a maximum number of BBVs to keep in memory before\nflushing them to disk (or stdout) and reclaiming the space. This option\nis enabled by default with a value of `100` BBVs kept in memory at any\ngiven time.\n\nThe implementation also removes the `bb_id_count_pair_t` structure.\nInstead, the BBV vector now uses the BB ID directly as an index to store\nthe weighted execution counts.\n\nAdds a test that uses `-save_every_bbv` running DrPoints on our simple\n\"hello world\" app. Because we write BBVs every instruction interval, the\noutput is supposed to have \"Hello, world!\" in the middle of the printed\nBBVs.\n\nIssue #7685" }, { "commit": "7d73f0b8b733a92ed7acf7bbf3f63d7b809a3f5a", "tree": "05be3a742474e7b028d6bf6ac3401b808255ba9b", "parents": [ "38e7ea99724f4f9d4a22bd02af3ca01e6517413a" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Fri Feb 20 19:47:47 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Feb 20 19:47:47 2026" }, "message": "Fix build warnings in scattergather test (#7818)\n\nRemoves the \"w\" suffix from \"mov\" to fix assembler warnings in the x86\nscattergather assembly.\n\nTested: the warnings go away on my gcc 15.2 with this change.\n\nFixes #7817" }, { "commit": "38e7ea99724f4f9d4a22bd02af3ca01e6517413a", "tree": "af49aa3de906d8011d441fd41ed45d0ce835ab8c", "parents": [ "e650fbf0093185925328daf76a3a6493a0127704" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Fri Feb 20 15:47:59 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Feb 20 15:47:59 2026" }, "message": "i#5365 AArch64 tests: Use Ubuntu 24 for AArch64 CI (#7816)\n\nThe AArch64 pipelines should use Ubuntu 24 as Ubuntu 20 is getting old\nnow.\n\nIssue: #5365" }, { "commit": "e650fbf0093185925328daf76a3a6493a0127704", "tree": "73297ff06099336297fc25031d0dab7f8866a47b", "parents": [ "01c3e166115948fba747e8b107c4ad6100f5a2c2" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Thu Feb 19 09:58:40 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Feb 19 09:58:40 2026" }, "message": "i#5365 AArch64 tests: do not run PAuth tests on CentOS 9 (#7812)\n\nThe CMake script was using a different method to DynamoRIO to determine\nif the PAuth feature was available. This meant that PAuth tests were\nbeing run but DynamoRIO would assert when encoding PAuth instructions.\n\nUpdate the CMake macro to read the AArch64 Instruction Set Attribute\nRegisters as well as trying to execute a PAuth instruction.\n\nIt appears that in some cases instructions will execute even when the OS\ndoes not advertise support for the feature.\n\nIssue: #5365" }, { "commit": "01c3e166115948fba747e8b107c4ad6100f5a2c2", "tree": "7b7e981d6a63689018f8154004dc34b4b9220be2", "parents": [ "c58e0859e3270fbd74e1e993489427bfc159ff97" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Sun Feb 15 05:41:03 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Feb 15 05:41:03 2026" }, "message": "Version in ci-package windows bug fix (#7813)\n\nRemoves `| tr -d \u0027\\n\u0027` from `ci-docs` and `ci-package`\nas it was causing a failure in `ci-package` for Windows,\nand `$()` already removes trailing `\\n` anyway.\n\nTested by running the `ci-docs` and `ci-package`\nworkflows manually." }, { "commit": "c58e0859e3270fbd74e1e993489427bfc159ff97", "tree": "3cea7c8acd1c4a910ee1b2742c134ceba4fedf01", "parents": [ "e980a6d8ab81c66cac54614c55a1ce29476be700" ], "author": { "name": "Gandholi Sarat", "email": "gandholisarat@gmail.com", "time": "Fri Feb 13 05:21:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Feb 13 05:21:21 2026" }, "message": "docs: unify user journey and clarify build and early deployment flow (#7806)\n\nThis PR refines the structure and navigation of the DynamoRIO\ndocumentation by establishing a canonical end-to-end **User Journey** on\nthe home page and aligning the build and deployment guides with that\nflow.\n\nThe build documentation is reorganized to clearly separate quick-start\nguidance from advanced build scenarios, and to explicitly document build\nlayout, install outputs, and platform/architecture scope. Runtime\nvalidation steps are removed from the build flow to keep build and\nexecution concerns distinct.\n\nThe deployment documentation adds concise execution context, including\nwhere `drrun` comes from, how the launch models differ (`drrun`,\n`drconfig`, `drinject`), and what constitutes a first successful run.\nPlatform-specific deployment content (Android, QEMU) is grouped under an\nadvanced section, and attach behavior is consistently marked as\nexperimental.\n\nThe Build Your Own Tool page is kept focused on client APIs and\nconcepts, with a short reference to the canonical User Journey rather\nthan duplicating workflow steps.\n\nDocumentation only; no API, tooling, or behavioral changes are\nintroduced." }, { "commit": "e980a6d8ab81c66cac54614c55a1ce29476be700", "tree": "706a06b16494a85e053bb561b3fd69562de0fe7d", "parents": [ "26c8fc1a352d1d3f4cc8f0440b10cfc595a3bd02" ], "author": { "name": "Gandholi Sarat", "email": "gandholisarat@gmail.com", "time": "Thu Feb 12 05:55:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Feb 12 05:55:45 2026" }, "message": "i#4915: label non-fetched instructions in drmemtrace view tool (#7810)\n\nInstruction records with type TRACE_TYPE_INSTR_NO_FETCH were previously\ndisplayed as normal ifetch entries in the drmemtrace view tool when\ndecoding was enabled, which was misleading for REP string expansion.\n\nThis change updates the view tool output to label such records as\nnon-fetched, without altering trace generation or expansion logic.\n\nXref #4915." }, { "commit": "26c8fc1a352d1d3f4cc8f0440b10cfc595a3bd02", "tree": "6c31c7dfcecfd72b776e255f4ddfa803bebf5ea3", "parents": [ "1d98b9f9f5c3531e47cb144d7633bfc085c092c1" ], "author": { "name": "Gandholi Sarat", "email": "gandholisarat@gmail.com", "time": "Wed Feb 11 04:01:46 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Feb 11 04:01:46 2026" }, "message": "i#4874: doc standalone decoder x87 (#7804)\n\nThis change documents that floating-point (x87/SSE) state handling\napplies only\nto managed DynamoRIO modes.\n\nIn standalone decoder mode, proc_save_fpstate() and\nproc_restore_fpstate() are\nstubbed out and do not preserve any state. The updated documentation\nclarifies\nthis behavior for proc_* FP APIs, opnd_create_immed_float/double(), and\ndr_prepare_for_call(), preventing incorrect assumptions when\ndisassembling\nfloating-point instructions.\n\nFixes #4874." }, { "commit": "1d98b9f9f5c3531e47cb144d7633bfc085c092c1", "tree": "03e59de1b4b9063f8b975585891c28d3c05cb1bd", "parents": [ "d1912c7f16feca6057fa69953719280166a44021" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Tue Feb 10 21:13:08 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 10 21:13:08 2026" }, "message": "i#1565: Move version.txt into make/ (#7811)\n\nMoves `version.txt` file from `/.github/workflows/`\nto `make/` as this file is not related to GitHub\nworkflows only.\n\nUpdates the path to this file in CMakeLists.txt,\nci workflows, and documentation.\n\nIssue #1565" }, { "commit": "d1912c7f16feca6057fa69953719280166a44021", "tree": "41b6e9dadbcd046c8c53a4af6eb86be542d8669a", "parents": [ "eb8c0c7ac172d77a8ee0e99756f20191bac7ffa6" ], "author": { "name": "Gandholi Sarat", "email": "gandholisarat@gmail.com", "time": "Tue Feb 10 16:22:00 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 10 16:22:00 2026" }, "message": "i#4138 samples: clarify why instrace does not expand REP string instructions (#7789)\n\nDocument the rationale for not expanding REP-prefixed string instructions\nin the instrace sample clients.\n\ninstrace is a simple instruction tracer focused on instruction fetches,\nnot per-iteration memory accesses. Expanding REP would emit multiple\nconsecutive instances of the same instruction, which is often confusing\nin instrace output and differs from tools like perf that count only a\nsingle instance.\n\nEmulation-aware expansion of REP and scatter/gather instructions\nrequires consuming emulation metadata via drmgr_orig_app_instr_for_fetch() and\ndrmgr_orig_app_instr_for_operands(), as done in memtrace.\nThat complexity is intentionally avoided in instrace and left to emulation-aware\nsamples.\n\nFixes #4138." }, { "commit": "eb8c0c7ac172d77a8ee0e99756f20191bac7ffa6", "tree": "662f8144c40053535bd4ec5d08bb882c9048e7c8", "parents": [ "f106057fd5802d8e83b539281e51254600e3a9df" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Tue Feb 10 15:30:53 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 10 15:30:53 2026" }, "message": "i#6412: Move instr_to_instr_type to raw2trace_shared (#7809)\n\nMoves the instr_to_instr_type helper to raw2trace_shared to allow reuse\nby other offline libs.\n\nAdds an ir_utils_t class to group together such utility functions.\n\nIssue: #6412" }, { "commit": "f106057fd5802d8e83b539281e51254600e3a9df", "tree": "0f8a19ac2403f3f21a42e02e828e68f352dd3b73", "parents": [ "cb7628f3a10e1830fbe22758d2954e49ee74703c" ], "author": { "name": "Gandholi Sarat", "email": "123803490+GandholiSarat@users.noreply.github.com", "time": "Tue Feb 10 05:32:31 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 10 05:32:31 2026" }, "message": "i#3424: document NULL where behavior for dr_insert_clean_call (#7803)\n\nThis PR documents the behavior of passing NULL as the `where` argument\nto `dr_insert_clean_call()`.\n\nThe behavior already exists and is documented internally in a\nnon-Doxygen\ncomment in `instrlist.h`, but was not exposed in the public API\ndocumentation.\n\nNo runtime behavior is changed.\n\nFixes #3424" }, { "commit": "cb7628f3a10e1830fbe22758d2954e49ee74703c", "tree": "24289a7c36d00005184625a29ec41e337a59eff7", "parents": [ "b9a5be1f648293bc4e816dce1db7c81c8788c19b" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Tue Feb 10 05:10:42 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 10 05:10:42 2026" }, "message": "i#1565: Define major.minor version in file (#7808)\n\nCentralizes DynamoRIO\u0027s major and minor versioning by introducing a\n`.github/workflows/version.txt` file as the single source of truth for\nboth cmake and the GitHub CI workflows `ci-docs`, `ci-package`.\nThe `version.txt` file is read in `CMakeLists.txt` and the CI workflows\nand it\u0027s supposed to only contain \"major.minor\" version numbers in its\nfirst line. We don\u0027t sanitize its content except removing trailing `\\n`.\n\nUpdates doc accordingly.\n\nIssue #1565" }, { "commit": "b9a5be1f648293bc4e816dce1db7c81c8788c19b", "tree": "d7938ab69487e2208467d05a6ceb1f43cbc5086b", "parents": [ "2c4f7befed9f28fdf01cfc0dec6cd0313598d95a" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Sat Feb 07 20:35:49 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sat Feb 07 20:35:49 2026" }, "message": "i#7798: Release 11.91 fix (#7807)\n\nPR #7799 missed increasing the minor version to\n91 for creating a new release, causing the weekly\nGitHub CI to fail. Increasing here.\n\nIssue #7798" }, { "commit": "2c4f7befed9f28fdf01cfc0dec6cd0313598d95a", "tree": "ad7eed1308feccde3ad62c1e1adca584ac323782", "parents": [ "5656a45a8ee1d2ec021b5e35bee812a4213bb1dc" ], "author": { "name": "Gandholi Sarat", "email": "123803490+GandholiSarat@users.noreply.github.com", "time": "Sat Feb 07 01:03:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sat Feb 07 01:03:45 2026" }, "message": "docs: sample client overview into HTML documentation (#7802)\n\nThis PR adds the high-level overview of DynamoRIO sample clients into\nthe HTML\ndocumentation, expanding the existing list in `api/docs/samples.dox`.\n\nChanges included:\n- Added concise per-sample descriptions to `api/docs/samples.dox`,\ncombining\n purpose and motivation in a single introductory paragraph per sample.\n- Used stable Doxygen references (`\\ref page_*`) to link to relevant\nextension\n documentation.\n- Updated `api/samples/README.md` to point readers to the HTML\ndocumentation\n instead of duplicating content.\n- Omitted `MF_moduledb.c` from the list, as it requires a\nno-longer-maintained\n custom configuration.\n\nThis PR supersedes and replaces the earlier attempt in\ndocs: add high-level overview of sample clients (#7788), which was\nclosed after\nreview feedback to move the content into the HTML docs and to use a\nproper\nfeature branch." }, { "commit": "5656a45a8ee1d2ec021b5e35bee812a4213bb1dc", "tree": "070ad38ba2a400859a69741efa47d7397750e096", "parents": [ "203507ad054ccc0a8164196c7c9af8b04403ec52" ], "author": { "name": "Enrico Deiana", "email": "edeiana@google.com", "time": "Fri Feb 06 19:20:25 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Feb 06 19:20:25 2026" }, "message": "i#7798: Add drvector_clear() API (#7799)\n\nThis feature enhances drvector by introducing a `zero_alloc`\nconfiguration and a `drvector_clear()` API. When `zero_alloc`\nis enabled, the container zero-initializes its internal storage\nwhen initializing, resizing, or clearing the vector.\n`zero_alloc` is a config parameter inside the new\n`drvector_config_t` struct and can be passed to the newly\nintroduced `drvector_init_ex()`. The new `drvector_clear()`\nfunction allows users to empty a drvector\u0027s contents while\nretaining its allocated capacity for reuse. It invokes the\nuser-provided `free_data_func()` for all existing entries\n(like `drvector_delete()`), and zeroes out the storage of the\nvector if `zero_alloc` is set, providing a more efficient\nalternative to deleting and re-initializing the container.\n\nAdds documentation about drvector in\n`ext/drcontainers/drcontainers.dox`.\n\nAdds a test in `suite/tests/client-interface/drcontainers-test.dll.c`.\n\nAdds `drvector_config_t` (which contains `zero_alloc`),\n`drvector_init_ex()`, and `drvector_clear()` APIs to release doc.\n\nVersion bumped to 11.91 since this PR contains\ncompatibility-breaking changes.\n\nFixes #7798" }, { "commit": "203507ad054ccc0a8164196c7c9af8b04403ec52", "tree": "fa0c931a24e0272c100d5e928b79fa82e966084e", "parents": [ "6afdbf661cc1449c825e3dc627edda43ab16ca99" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Fri Feb 06 16:00:07 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Feb 06 16:00:07 2026" }, "message": "i#5365 AArch64 tests: rseq tests failing on CentOS 9 (#7790)\n\nglibc 2.35+ (and 2.34+ for RHEL/CentOS and possibly other OSes that\nbackported the feature) make use of the rseq syscall which interferes\nwith DynamoRIO\u0027s rseq tests.\n\nThe rseq syscall in the rseq tests was always failing with errno set to\nEINVAL because glibc had already registered its own rseq structure and\nonly one registration is allowed per thread.\n\nWe can fix this by explicitly turning off glibc\u0027s rseq registration for\nthe effected tests by setting the environment variable:\n\"GLIBC_TUNABLES\u003dglibc.pthread.rseq\u003d0\".\n\nAlso fix the CMakeLists.txt function set_properties() which was\nerroneously adding the test prefix to the environment variable.\n\nIssue: #5365\n\nCo-authored-by: Jack Gallagher \u003cjack.gallagher@arm.com\u003e" }, { "commit": "6afdbf661cc1449c825e3dc627edda43ab16ca99", "tree": "0c85482478ebadf81f7e0ce8ede02134f6c8076f", "parents": [ "b628acc686998445c44f02f9e313997b491f109f" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Thu Feb 05 03:02:16 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Feb 05 03:02:16 2026" }, "message": "i#7793: Add record filter func to remove kernel trace content (#7795)\n\nAdds a new record_filter_func_t, kernel_filter_t, which removes kernel\nsystem call and\ncontext switch content from the trace.\n\nThe kernel system call trace content is between\nTRACE_MARKER_TYPE_SYSCALL_TRACE_START and\nTRACE_MARKER_TYPE_SYSCALL_TRACE_END; and, the kernel context switch\ntrace content is between TRACE_MARKER_TYPE_CONTEXT_SWITCH_START and\nTRACE_MARKER_TYPE_CONTEXT_SWITCH_END.\n\nThe filter also updates the trace file type to remove the\nOFFLINE_FILE_TYPE_KERNEL_SYSCALLS bit.\n\nNote that since DynamoRIO traces are initially user-mode only with\nkernel added later, this tool is not very useful for them because one\u0027d\npresumably already have the user-mode version preserved. This tool is\nmeant to be used on traces generated by other methods like full system\nemulation which are then converted to the drmemtrace format.\n\nIssue: #7793" }, { "commit": "b628acc686998445c44f02f9e313997b491f109f", "tree": "f3f8d2bf87d0631802796480c2ada4465c59a534", "parents": [ "1c8676e0008ad45d10d9d5c0a6512d2ad19522cf" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Wed Feb 04 01:30:05 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Feb 04 01:30:05 2026" }, "message": "i#7493: Fix treatment of bools on C during build (#7794)\n\nDefers CHECK_TYPE_SIZE calls to after CMAKE_C_FLAGS have been decided.\nWe use -std\u003dgnu99 which affects CHECK_TYPE_SIZE\u0027s behavior for C bools.\n\nSets -std\u003dgnu99 on UNIX test builds also, for consistent treatment.\n\nThe zlib \"old-style function definition\" warnings have gone away now,\nbecause it\u0027s fixed in latest source:\nhttps://github.com/madler/zlib/blob/51b7f2abdade71cd9bb0e7a373ef2610ec6f9daf/contrib/minizip/ioapi.c#L211.\n\nFixes: #7493" }, { "commit": "1c8676e0008ad45d10d9d5c0a6512d2ad19522cf", "tree": "9a4fa2ffc11181b1e4a357939851c4a0b3b06ecf", "parents": [ "1241dd2846a61c98ab41111748de72b06083d2a4" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Feb 03 19:25:36 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 03 19:25:36 2026" }, "message": "i#7695 x32 fail: Add legacy drmemtrace header diagnostics (#7801)\n\nAugments the drmemtrace header order error message with more information\nto try to diagnose the weird x86-32 legacy trace test failures we\u0027re\nseeing on Github Actions.\n\nIssue: #7695" }, { "commit": "1241dd2846a61c98ab41111748de72b06083d2a4", "tree": "508392a511a9baf3deb6c8771834952dd1fcbdde", "parents": [ "1ea79cb029ac0c49649332026ee0c3223943a166" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Feb 03 19:25:26 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 03 19:25:26 2026" }, "message": "i#3320 instr assert: Ignore irregular-windows-simple + add offline (#7800)\n\nAdds the tool.drcachesim.irregular-windows-simple test to the ignore\nlist for x86_64 as it is hitting the type_is_instr drcachesim online\nassert frequently. Unfortuantely we have not been able to figure out the\nweird pipe behavior causing the assert, and we can\u0027t easily continue\npast it. The 3x retry should make it very rare but somehow this test\nkeeps hitting it.\n\nTo mitigate the loss of coverage, adds an offline version of the same\ntest, to ensure we have a non-ignored regression test of the\n-trace_instr_intervals_file feature.\n\nIssue: #3320" }, { "commit": "1ea79cb029ac0c49649332026ee0c3223943a166", "tree": "571b1496bb5274f38e365b16c915209122220efd", "parents": [ "63ee1c83d8e1084a857ae7c7bbcc72ff661172a2" ], "author": { "name": "Gandholi Sarat", "email": "123803490+GandholiSarat@users.noreply.github.com", "time": "Tue Feb 03 18:05:48 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 03 18:05:48 2026" }, "message": "i#2171: Ignore trace-building basic blocks in bbsize sample (#7792)\n\nThe bbsize sample was overcounting basic blocks when traces were\nenabled.\n\nThis change skips basic blocks created for trace building (for_trace \u003d\u003d\ntrue), while preserving the existing translating guard.\n\nVerified locally by running bbsize with traces enabled and disabled; \nThe reported number of basic blocks is now consistent between the two\nmodes.\n\nFixes #2171" }, { "commit": "63ee1c83d8e1084a857ae7c7bbcc72ff661172a2", "tree": "0d2276974bcd65f01d7a5fcb5a7bc3ee34955ee7", "parents": [ "b75f65ffa40833f238a458aba45b2b7e507d8a74" ], "author": { "name": "Abhinav Anil Sharma", "email": "sharmaabhinav@google.com", "time": "Tue Feb 03 12:29:47 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Feb 03 12:29:47 2026" }, "message": "i#7796 Windows Doxygen: Mitigate failures by pinning to older version (#7797)\n\nMitigates Windows CI workflow failures seen due to Doxygen warnings in\nthe recent automatic update to v1.16.1. For now we pin to v1.14.0, the\nversion before the update.\n\nAdds a TODO to fix the underlying issues and remove the workaround.\n\nIssue: #7796" }, { "commit": "b75f65ffa40833f238a458aba45b2b7e507d8a74", "tree": "2acd78e6ea4100cc5c97cce4c1f9b2b68e28465c", "parents": [ "b6e1cccf3ba29dfd4c450f0125022ed82f8b79f5" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Thu Jan 29 17:21:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 29 17:21:21 2026" }, "message": "i#5365 Fix client.attach_test on latest platforms (#7787)\n\nIt seems that modern compilers are able to optimise out the loop in\ninfloop.c. Add a call to rand() to prevent this, allowing the test to\ncomplete before the application terminates.\n\nIssue: #5365" }, { "commit": "b6e1cccf3ba29dfd4c450f0125022ed82f8b79f5", "tree": "127df5eb4ec9b9a1822d4d54d64a62e96ac0ec7f", "parents": [ "4d35369d0e648c7189e100180f46e2c27e0d8f05" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Jan 29 16:36:15 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 29 16:36:15 2026" }, "message": "i#7556 record switches: Record start ordinal of switches (#7786)\n\nAdds the last timestamp to each switch record.\nAdds the input\u0027s instruction ordinal at the start of the segment to each\nswitch record.\nThis can be reliably used to sort within one input across cores.\nThere is some complexity in providing a uniform value in the\nface of input readahead; the presented value ends up being inclusive\nof the start instruction, as documented. This matches replay records.\n\nAdds unit tests.\nAlso tested on a large drmemtrace and compare to the replay record\nfor a target tid.\n\nIssue: #7556" }, { "commit": "4d35369d0e648c7189e100180f46e2c27e0d8f05", "tree": "532979b16721f511d0c23f749fbfc7c2bafa58d8", "parents": [ "4dab2d050a16ccb0b025fe9233e1d3c30e6411f7" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Tue Jan 27 20:32:46 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Jan 27 20:32:46 2026" }, "message": "i#7784: Add -exit_after_instrs drmemtrace option (#7785)\n\nAdds a new drmemtrace analyzer option -exit_after_instrs. This operates\nlike -exit_after_records, causing all tools to exit, but it counts\ninstructions instead of records and it operates per input instead of per\noutput.\n\nUpdates the documentation.\n\nAdds view_test test cases and and end-to-end test.\n\nModifies -exit_after_records to have a default value of 0 to match the\ndefault for the new -exit_after_instrs, which is most easily handled as\n0 to check for non-default settings. The existing code handling\n-exit_after_records already assumed 0 disabled the option.\n\nFixes #7784" }, { "commit": "4dab2d050a16ccb0b025fe9233e1d3c30e6411f7", "tree": "19a818bb58047515daddb94438eedc3a6bef541c", "parents": [ "1ef46830cf78157ab968fc6d5ae95691c2e1ff82" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Mon Jan 26 10:18:21 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Jan 26 10:18:21 2026" }, "message": "i#5365 Scatter/gather tests: add issue number to comment (#7783)\n\nReference issue #1672 in the comments about not using annotations in the\nscatter/gather tests.\n\nIssue: #5365" }, { "commit": "1ef46830cf78157ab968fc6d5ae95691c2e1ff82", "tree": "6a02d2466e5a8eb48e858f552d51109502fb0b44", "parents": [ "910f54fd2c46a7ba0b34f5294c210a18222d276d" ], "author": { "name": "Dmitriy Petrov", "email": "dmitry.s.petrov@gmail.com", "time": "Fri Jan 23 10:17:55 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Fri Jan 23 10:17:55 2026" }, "message": "i#7590: Drcachesim configuration reader refactoring (#7619)\n\nFeature changes:\n- implemented support for nested maps like:\n ```name0 { name1 { name2 val2 } }```\n- improved configuration error reporting with line and column numbers.\n\nRefactored configuration reading code:\n- implemented tokeniser class to convert configuration stream to\nsequence of tokens and make simple checks;\n- refactored and unified type checks for cache parameters;\n- added template function `get_type_name` for human-readable type names\nin error reporting;\n- removed unnecessary class attributes.\n \nImplemented unit tests for configuration reader.\n\nFixes #7590" }, { "commit": "910f54fd2c46a7ba0b34f5294c210a18222d276d", "tree": "962e8a7ed9443db10210caf2babf454c5a73989a", "parents": [ "b54c434a90a1e86431ff916e5678ba58edfcacfd" ], "author": { "name": "Kaiyeung Luk", "email": "kyluk@google.com", "time": "Thu Jan 22 23:23:14 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 22 23:23:14 2026" }, "message": "i#7779: Store Aarch64 SVE registers in arrays of dr_simd_t and dr_svp_t. (#7780)\n\nSVE registers (Z0-Z31) and predicate registers (P0-P15) are encapsulated\nwithin arrays of dr_simd_t and dr_sve_t types, respectively.\n\nWhen the SVE registers are written to the dstack using\ninsert_save_or_restore_sve_registers(),\ncreate_base_disp_for_save_restore() is used to compute the offset of the\nSVE registers, i.e.\n```\n case SVE_ZREG_TYPE:\n opsz \u003d opnd_size_from_bytes(proc_get_vector_length_bytes());\n offset \u003d num_saved * proc_get_vector_length_bytes();\n break;\n case SVE_PREG_TYPE:\n opsz \u003d opnd_size_from_bytes(proc_get_vector_length_bytes() / 8);\n offset \u003d num_saved * (proc_get_vector_length_bytes() / 8);\n break;\n```\nThe offset calculation considers the size of the register supported on\nthe platform based on roc_get_vector_length_bytes(), but not arrays of\ndr_simd_t and dr_sve_t. In effect, all the registers are packed together\nwithout considering the size of dr_simd_t and dr_svep_t.\n\nWhen other functions retrieve the register values based on the arrays,\nthey get incorrect values (except for z0).\n\nThis PR changes the code to use the size of the array element to compute\nthe offset, so that register values are stored in the corresponding\nelements.\n\nAdd a test to verify SVE registers are saved and restored properly using\ndr_redirect_ececution().\n\nFixes: #7779" }, { "commit": "b54c434a90a1e86431ff916e5678ba58edfcacfd", "tree": "885a3ba7e3b8ccb531846280902545f90be3d3e5", "parents": [ "6f3eda6afecbea29ebac90560cbb8a80881038eb" ], "author": { "name": "MOON", "email": "moonseopp.kim@gmail.com", "time": "Thu Jan 22 15:17:01 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 22 15:17:01 2026" }, "message": "i#7769: Fix instruction counting to exclude REP emulation overhead (#7772)\n\ntrace_after_instrs previously counted all application instructions\nincluding REP string emulation overhead, which misaligned\ninstruction-based trace windows with fetch-based analyses (e.g., BBVs\nand SimPoints). This fix excludes the emulation overhead from counting.\n(Removing the superfluous unfetched instruction from each REP string\nloop iteration is not solved here and falls under #4915 and #4948.)\n\nFixes #7769\n\nAdditional note : https://github.com/litz-lab/scarab-infra/issues/264\n\n## Regression test for REP instructions\n\n### Test asm\n```\n // Align stack pointer to cache line.\n and rsp, -16 // instruction 1\n\n mov ecx, 50 // instruction 2\n lea rdi, dst_data // instruction 3\n\n // Single REP instruction with 50 iterations\n rep stosb // instruction 4\n\n--------- trace_after_instrs 53 with new PR --------- (3 + 50[REP])\n // Exit\n mov rdi, 0 // instruction 5\n mov eax, 231 // instruction 6: SYS_exit_group\n syscall // instruction 7\n```\n\n### Result\n1. Main branch test result - fail\n``` \n438: ---- \u003capplication exited with code 0\u003e ----\n438: \n438: View tool results:\n438: \n438: 44 : total instructions\n438: \n438: | failed to match expected output |.*3 : total instructions\n438: \n438: |\n438: \n438: \n2/2 Test #438: code_api|tool.drcachesim.allasm-repstr-basic-counts ...***Failed 0.08 sec\n\n0% tests passed, 2 tests failed out of 2\n\nLabel Time Summary:\nRUN_IN_RELEASE \u003d 0.17 sec*proc (2 tests)\n\nTotal Test time (real) \u003d 1.96 sec\n\nThe following tests FAILED:\n 437 - code_api|tool.drcacheoff.allasm-repstr-basic-counts (Failed)\n 438 - code_api|tool.drcachesim.allasm-repstr-basic-counts (Failed)\nErrors while running CTest\n\n``` \n\n2. new PR test pass\n``` \n2/2 Test #438: code_api|tool.drcachesim.allasm-repstr-basic-counts ... Passed 0.07 sec\n\nThe following tests passed:\n code_api|tool.drcacheoff.allasm-repstr-basic-counts\n code_api|tool.drcachesim.allasm-repstr-basic-counts\n\n100% tests passed, 0 tests failed out of 2\n\nLabel Time Summary:\nRUN_IN_RELEASE \u003d 0.15 sec*proc (2 tests)\n\nTotal Test time (real) \u003d 1.91 sec\n```" }, { "commit": "6f3eda6afecbea29ebac90560cbb8a80881038eb", "tree": "9f4cdb077e71fb7e8ff91fabf1f5ffce735fb806", "parents": [ "b40136b48081f3c5e70cb124f0f84e2c2e90462f" ], "author": { "name": "Phil Ramsey", "email": "phil.ramsey@arm.com", "time": "Thu Jan 22 10:14:09 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 22 10:14:09 2026" }, "message": "i#5365 Fix scatter / gather unit tests for Ubuntu 24.04 (#7781)\n\nThe current method of marking the start of scatter / gather tests with\nNOP instructions is complicated and potentially unreliable.\n\nInstead use the DynamoRIO module functions to get the start address of\nthe exe and then check if the basic block in the client callback\nfunction is from the exe. This allows us to ignore OS code.\n\nIssue: #5365" }, { "commit": "b40136b48081f3c5e70cb124f0f84e2c2e90462f", "tree": "aabac1389ad00c2ebce8f7a7476a144d293da63c", "parents": [ "a203ae439fa6aab8d5df87b2c78dc8dcd03ffe57" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Jan 15 22:01:45 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 15 22:01:45 2026" }, "message": "Set SpaceInEmptyBlock in .clang-format (#7775)\n\nExplicitly adds \"SpaceInEmptyBlock: false\" to our .clang-format to match\nthe prior behavior when using newer versions such as 21." }, { "commit": "a203ae439fa6aab8d5df87b2c78dc8dcd03ffe57", "tree": "2b9917029b116aece8fcfacfa58b77c3045ce725", "parents": [ "650f9409e6af259c9b2c84ac5e2d4b9203e02053" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Jan 15 22:01:33 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 15 22:01:33 2026" }, "message": "i#6107 mod bug: Skip workaround for newer versions (#7776)\n\nThe workaround for #6107 can\u0027t handle duplicate timestamps, which we do\nsometimes see in real traces. We don\u0027t need the workaround for current\ntraces, though, so a version check avoids the need to run it at all, as\nwe\u0027ve incremented the trace version twice since then.\n\nAdds a unit test that fails without the fix.\n\nIssue: #6107" }, { "commit": "650f9409e6af259c9b2c84ac5e2d4b9203e02053", "tree": "57abdfe294abed42d5ccb48e8028aa3a4afe6add", "parents": [ "9a4aa4cce0b02029b564404abe827213d74dd80f" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Thu Jan 15 22:00:54 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jan 15 22:00:54 2026" }, "message": "i#7777: Avoid annotations in drmemtrace tests (#7778)\n\nBuilds a no-annotation version of client.annotation-concurrency for\ndrmemtrace tests, as annotations are not supported for offline mode\n(#4141).\n\nFixes #7777\nIssue: #4141, #7777" }, { "commit": "9a4aa4cce0b02029b564404abe827213d74dd80f", "tree": "a232b8367c91f043369ee773d01784ced1d251fb", "parents": [ "48901daaabd850848ee73ba26cb7f800a2115544" ], "author": { "name": "Derek Bruening", "email": "bruening@google.com", "time": "Wed Jan 14 22:32:00 2026" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Jan 14 22:32:00 2026" }, "message": "i#7773: Raise error on invalid inputs on drmemtrace replay (#7774)\n\nWhen replaying a recorded drmemtrace schedule, the inputs need to be in\nthe same order as when recorded. If they\u0027re not, it\u0027s possible to hang\nwhen an input hits EOF but the record file says it has more data. This\nis turned into an explicit error to avoid that hang.\n\nAdds a unit test that hangs without the fix and passes with the fix.\n\nAlso fixes a schedule_stats assert when run on a replayed file, where it\ndid not expect a wait record, hit while debugging this issue.\n\nFixes #7773" } ], "next": "48901daaabd850848ee73ba26cb7f800a2115544" }