UPSTREAM: soc/intel/apollolake: Update default LPDDR4 CA ODT config Update default ODT config to have correct CA ODT settings as the current defaults are incorrect for all the current apollolake designs. All the current designs pull both A and B channels' LPDDR4 modules' ODT pins to 1.1V. Therefore, the correct impedance setting needs to be applied. In order for the settings to take effect one needs to clear the memory training cache in deployed systems. Trigger this by bumping the memory setting version for the SoC. If needed in the future support for allowing the override of this setting from the mainboard should be straight forward. It's just not necessary at this time. BUG=b:37687843 TEST=BAT test, warm, reboot, S3 cycle test Change-Id: Ie359847db7391798b2dce5301addecb3d95c88cc Signed-off-by: Furquan Shaikh <[email protected]> Original-Commit-Id: a3d13fbd699e82781b436c88941c6d8d83133400 Original-Change-Id: I9a2f7636b46492a9d08472a0752cdf1f86a72e15 Original-Signed-off-by: Ravi Sarawadi <[email protected]> Original-Signed-off-by: Aaron Durbin <[email protected]> Original-Reviewed-on: https://review.coreboot.org/19397 Original-Reviewed-by: Paul Menzel <[email protected]> Original-Reviewed-by: Duncan Laurie <[email protected]> Original-Reviewed-by: Furquan Shaikh <[email protected]> Original-Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/490512 Reviewed-by: Aaron Durbin <[email protected]> Commit-Queue: Aaron Durbin <[email protected]> Tested-by: Aaron Durbin <[email protected]> (cherry picked from commit 6ca08e91e3c0813a21eebc8dcda3e98d263a2bcb) Reviewed-on: https://chromium-review.googlesource.com/490517 Reviewed-by: YH Lin <[email protected]> Commit-Queue: YH Lin <[email protected]> Tested-by: YH Lin <[email protected]>